Semiconductor Device Edge Sensing Line Defect Detection
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Solution Overview
Problem
The complexity and diversification of semiconductor device structures complicate the integration of defect sensing elements, leading to increased size and fabrication challenges, particularly during cutting and heating processes that can cause cracks in semiconductor chips.
Innovation Solution
A semiconductor device design that includes a first semiconductor chip with memory cells and a second semiconductor chip with a detecting circuit, where a sensing line extends along the edge of one or both chips to detect defects without the need for extensive defect sensing elements within the first chip, allowing for simplified fabrication and defect detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sensing lines are arranged in edge portions of each semiconductor chip to detect defects, then defect detection capability is improved, but device complexity and size increase
Solution Approach 1:
The sensing line is extracted from the first semiconductor chip and extended to the second semiconductor chip. The detecting circuit is placed entirely in the second chip, separating the sensing function from the memory chip. This reduces the first chip to only essential components (memory cells, bitlines, wordlines, bonding pads) while maintaining defect detection capability through the extended sensing line in the second chip.
Solution Approach 2:
The second semiconductor chip serves multiple functions: it acts as both a functional component (with input/output circuit for data writing) and as a housing for the detecting circuit. The sensing line extended to the second chip allows this chip to perform both operational and defect detection roles, consolidating functionality and reducing overall device complexity.
2Reliability
If sensing lines are arranged in edge portions of each semiconductor chip to detect defects, then defect detection capability is improved, but the size of semiconductor devices increases
Solution Approach 1:
The detecting circuit is extracted from the first semiconductor chip and placed in the second chip. This eliminates the need for separate defect detection components in the first chip, reducing its size. The sensing line is extended to utilize the second chip's area, so no additional space beyond the two chips is required for defect detection functionality.
3Reliability
If extensive defect sensing elements are provided in each semiconductor chip, then defect detection coverage is improved, but fabrication complexity increases during cutting and heating processes
Solution Approach 1:
The detecting circuit is extracted from the first chip and placed in the second chip, which has different thermal and mechanical properties. This separation protects the detecting circuit from the harsh fabrication conditions (cutting and heating) that the first chip undergoes. The sensing line serves as a bridge that can withstand these conditions while protecting the sensitive detecting circuit in the second chip.
4Reliability
If sensing lines are extended to surrounding semiconductor chips, then defect detection capability is improved, but integration density decreases
Solution Approach 1:
The sensing line is merged with the inter-chip connection structure, extending along the edge of the first chip and connecting to the second chip. This utilizes the existing physical space between and around the chips for dual purposes: both for electrical connection and for defect sensing. The detecting circuit in the second chip is merged with the I/O circuit, consolidating functionality without requiring additional dedicated space.
Data Source
AI summary
A semiconductor device includes a first semiconductor chip, a second semiconductor chip, an input/output circuit, a sensing line, and a detecting circuit. The first semiconductor chip includes bitlines, wordlines, first bonding pads electrically connected to the bitlines, second bonding pads electrically connected to the wordlines, and memory cells electrically connected to the bitlines and the wordlines. The second semiconductor chip includes third bonding pads that are electrically connected to the first bonding pads and fourth bonding pads that are electrically connected to the second bonding pads. The input/output circuit writes data to the memory cells via the third bonding pads. The sensing line extends along edge portions of at least one of the first and second semiconductor chips. The detecting circuit is in the second semiconductor chip and can detect defects from at least one of the first and second semiconductor chips using the sensing line.