Semiconductor Package Edge Support to Prevent Planarization Bevel Damage

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Solution Overview

Problem

The integration of semiconductor devices in high-density packaging faces challenges due to potential damage during planarization processes, particularly at the edges where bevel edges can occur, leading to abnormal functionalities or loss of functionality.

Innovation Solution

Incorporating dummy dies and deep trench capacitors at the peripheral regions during the manufacturing process to act as structural supports, preventing the bevel edge from extending into the device region and thereby protecting the functional semiconductor dies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high-density packaging is implemented to increase integration density, then more devices and components can be integrated into a given volume, but the risk of damage during planarization increases and bevel edges occur more frequently at the edges

Engineering Contradiction:

Improveintegration densityVSAvoiddamage risk during planarization

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by forming dummy dies and deep trench capacitors at the peripheral regions before the planarization process. These structures are prepared in advance to serve as protective elements that will prevent bevel edge formation during subsequent planarization, thereby resolving the contradiction between high-density packaging and planarization damage risk

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by creating dummy dies and deep trench capacitors that act as protective buffers at the edges of the semiconductor structure. These structures cushion against the harmful effects of planarization by absorbing stress and preventing bevel edge formation, thus protecting the functional semiconductor devices while maintaining high integration density

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Manufacturing precision

If planarization is performed to achieve flat surfaces, then surface uniformity is improved, but bevel edges form at the peripheral regions causing abnormal functionalities

Engineering Contradiction:

Improvesurface uniformityVSAvoidbevel edge formation

Core Design Contradiction:

Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful effect of planarization (bevel edge formation) into a beneficial outcome by using dummy dies and deep trench capacitors as sacrificial structures. These structures are intentionally designed to be removed after serving their protective function, transforming the planarization process from a source of damage to a means of protecting functional devices while achieving surface uniformity

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS20240412982A1Semiconductor structure and manufacturing method thereof

Publication Date: 2024.12.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor structure includes a wafer circuit structure, at least one first semiconductor die, at least one first supporting structure, and an encapsulant. The at least one first semiconductor die is disposed over and electrically connected to the wafer circuit structure in a device region of the semiconductor structure. The at least one first supporting structure is disposed over the wafer circuit structure in a peripheral region of the semiconductor structure. The encapsulant is disposed over the wafer circuit structure and encapsulates the at least one first semiconductor die and the at least one first supporting structure, where a thickness of the encapsulant at an edge of the semiconductor structure is less than a thickness of the encapsulant within the device region of the semiconductor structure.