Semiconductor Edge Termination Structure With Selective Carrier Storage

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Solution Overview

Problem

Conventional semiconductor devices with carrier storage layers in the edge termination structure suffer from reduced maximum breakdown voltage due to high impurity concentrations, which adversely affect the overall device performance.

Innovation Solution

A semiconductor device design where the high concentration carrier storage region is selectively disposed only in the active region and not in the edge termination structure, allowing for a low impurity concentration in the edge termination, thereby maintaining high breakdown voltage and reducing ON resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a carrier storage layer with high impurity concentration is disposed in the edge termination structure, then the conductivity modulation effect increases and ON resistance decreases, but the maximum breakdown voltage of the edge termination structure decreases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidimpurity concentration in edge termination
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent segments the device into two distinct regions with different impurity concentration characteristics: the active region contains the high impurity concentration carrier storage layer for conductivity modulation, while the edge termination structure maintains low impurity concentration for high breakdown voltage. This spatial segmentation resolves the contradiction by allowing each region to optimize its own properties without interfering with the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by giving different impurity concentration characteristics to different parts of the device. The active region has high impurity concentration (1×10^16 to 1×10^18 atoms/cm³) to achieve low ON resistance, while the edge termination structure has low impurity concentration (less than 1×10^16 atoms/cm³) to maintain high breakdown voltage. This localized optimization resolves the contradiction between conductivity modulation and breakdown voltage.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances the maximum breakdown voltage of the edge termination structure and the overall device, while maintaining low ON resistance by isolating the high concentration region to the active area, preventing decreases in breakdown voltage and facilitating effective conductivity modulation.

Implementation Method 1

The carrier storage layer becomes a barrier of minority carriers and the minority carrier storage effect becomes high, whereby current density between the collector and emitter increases and the conductivity modulation effect increases.

Methodology Applied
Scientific EffectMinority carrier storage effect:

Implementation Method 2

IGBTs have an advantage of low ON resistance consequent to the effects of conductivity modulation.

Methodology Applied
Scientific EffectConductivity modulation:

Implementation Method 3

an edge termination structure that surrounds the active region and has a function of relaxing the electric field of an n−-type drift layer at a base front surface side to maintain the breakdown voltage

Methodology Applied
Scientific EffectElectric field relaxation:

Data Source

PatentUS9728599B1Semiconductor device
Publication Date: 2017.08.08 FUJI ELECTRIC CO LTD
  • US9728599B1 patent drawing
  • US9728599B1 patent drawing
  • US9728599B1 patent drawing

AI summary

An edge termination structure that surrounds an active region is disposed outside the active region. In the active region, a MOS gate structure is disposed. Inside an n−-type drift layer, an n-type CS region that becomes a minority carrier barrier is disposed in a surface layer on a p+-type base layer side. The n-type CS region is disposed in the active region and is not disposed in the edge termination structure. Thus, the impurity concentration of the n−-type drift layer inside the edge termination structure is low enough to enable high breakdown voltage to be realized. In the n−-type drift layer, which has a low impurity concentration, a JTE structure that is formed from first and second JTE regions is disposed.