Semiconductor Edge Thinning Structure to Prevent Package Delamination

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Solution Overview

Problem

Conventional electronic components face reliability issues due to stress, particularly tensile stress, at the interface with carriers, leading to delamination, especially under varying temperatures, which existing technologies struggle to address effectively.

Innovation Solution

The implementation of a semiconductor body with a central active region and a stress release structure as a lateral edge portion, where the lateral edge portion is thinned to a minimum thickness of not more than 40% of the maximum thickness, effectively reducing stress and enhancing mechanical reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the semiconductor body thickness is reduced at the lateral edge portion to release stress, then stress at the interface is reduced and delamination is prevented, but the mechanical strength and structural integrity of the semiconductor body may be compromised

Engineering Contradiction:
Improveinterface stabilityVSAvoidmechanical strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies local quality by creating a stress release structure only at the lateral edge portion of the semiconductor body, while maintaining the original thickness in the central active region. This localized thinning reduces stress at the carrier interface where delamination occurs, without compromising the mechanical strength of the overall semiconductor body structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The semiconductor body is segmented into different thickness zones: a thinned lateral edge portion serving as a stress release structure and a central active region maintaining full thickness. This segmentation allows the structure to simultaneously achieve stress reduction at critical interfaces while preserving mechanical integrity in the active area.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the lateral edge portion is thinned to form a stress release structure, then manufacturing effort is reduced and reliability is improved, but the active region area may be reduced

Engineering Contradiction:
Improvecomponent reliabilityVSAvoidactive region area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The stress release structure is localized to the lateral edge portion with a minimum thickness of not more than 40% of the maximum thickness, while the central active region maintains its full thickness and functional area. This localized approach ensures that the active region area is preserved while still achieving stress reduction for improved reliability.

Inventive Principle:
Principle #3Local quality

3Reliability

If the minimum thickness of the lateral edge portion is set to not more than 40% of the maximum thickness, then stress release effectiveness is maximized, but the structural robustness may be reduced

Engineering Contradiction:
Improvestress release effectivenessVSAvoidstructural robustness
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent specifies a quantitative parameter threshold where the minimum thickness of the lateral edge portion is not more than 40% of the maximum thickness. This parameter change creates an optimal balance: thin enough to effectively release stress and prevent delamination, but thick enough to maintain structural robustness and mechanical stability of the semiconductor body.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240258372A1Electronic component and package including stress release structure as lateral edge portion of semiconductor body
Publication Date: 2024.08.01 INFINEON TECHNOLOGIES AG
  • US20240258372A1 patent drawing
  • US20240258372A1 patent drawing
  • US20240258372A1 patent drawing

AI summary

An electronic component is disclosed. The electronic component comprises a semiconductor body, an active region in a central portion of the semiconductor body, and a stress release structure for releasing stress and being formed as a lateral edge portion of the semiconductor body. The lateral edge portion has a minimum thickness of not more than 40% of a maximum thickness of the semiconductor body.