Semiconductor Structure Elastomer Warpage Mitigation

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Solution Overview

Problem

The challenge in semiconductor package structures is the frequent failure of joints due to warpage caused by coefficient of thermal expansion (CTE) mismatch between chips and boards, leading to stress on bumps and potential damage.

Innovation Solution

Incorporating an elastomer, such as polyimide, in the peripheral region of the dielectric layer structure, which absorbs stress and reduces warpage, thereby minimizing the stress on bumps and preventing joint failure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the chip and board structure are directly connected, then the electrical connection is achieved, but the CTE mismatch causes warpage and stress on bumps leading to joint failure

Engineering Contradiction:
Improvejoint reliabilityVSAvoidwarpage and stress
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

An elastomer layer is introduced as an intermediary between the chip and board structure. This elastomer absorbs the stress generated by CTE mismatch during thermal cycling, preventing direct stress transmission to the bumps and joints, thereby improving joint reliability while eliminating warpage issues

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The elastomer material is selected to have a coefficient of thermal expansion that matches both the chip and board structure. By changing the material parameters of the intermediate layer, the stress caused by CTE mismatch is minimized, preventing warpage and protecting joints from stress-induced failure

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the line width and pitch of semiconductor package structures are reduced for miniaturization, then integration density is improved, but joints fail more often

Engineering Contradiction:
Improveintegration densityVSAvoidjoint reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The elastomer serves as a stress-absorbing intermediary that protects the increasingly vulnerable joints in miniaturized structures. As line width and pitch are reduced making joints more susceptible to failure, the elastomer's stress absorption capability becomes critical for maintaining joint reliability while enabling higher integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

3Stability of the object's composition

If the peripheral region of the board structure is considered, then stress distribution can be improved, but this region is often overlooked in conventional designs

Engineering Contradiction:
Improvestress distributionVSAvoiddesign complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The elastomer is specifically positioned in the peripheral region of the board structure where stress concentration occurs. By applying the stress-absorbing property locally in this critical area rather than uniformly across the entire structure, the design improves stress distribution while maintaining simplicity

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The board structure is divided into functional regions: a mount region for the chip and a peripheral region for stress management. The elastomer is placed in the peripheral region to handle stress distribution, separating the functional requirements and improving overall structural stability

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The elastomer effectively reduces warpage in the peripheral region, alleviating stress on bumps and enhancing the reliability of semiconductor joints by absorbing transferred stress from the mount region.

Implementation Method 1

the elastomer effectively reduces warpage in the peripheral region, alleviating stress on bumps and enhancing the reliability of semiconductor joints by absorbing transferred stress from the mount region

Methodology Applied
Scientific EffectStress absorption: Elasticity

Implementation Method 2

Because the chip and the board structure have different coefficients of thermal expansion (CTE), the CTE mismatch between the chip and the board structure causes the warpage of the board structure

Methodology Applied
Scientific EffectCoefficient of thermal expansion mismatch: Thermal Expansion

Data Source

PatentUS9711442B1Semiconductor structure
Publication Date: 2017.07.18 NAN YA TECH
  • US9711442B1 patent drawing
  • US9711442B1 patent drawing
  • US9711442B1 patent drawing

AI summary

A semiconductor structure is provided. The semiconductor structure includes an electronic component and a board structure. The board structure includes a dielectric layer structure and at least one elastomer. The dielectric layer structure has a mount region and a peripheral region surrounding the mount region. The electronic component is disposed on the mount region, and the peripheral region has at least one first through hole. The elastomer is disposed in the first through hole.