Semiconductor Electrode Layout for Mounting Alignment Reliability
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Solution Overview
Problem
The existing semiconductor devices face connection failures and mounting issues due to the state of the wiring body, which affects the connection between the semiconductor element and the wiring body.
Innovation Solution
A semiconductor device design that includes a substrate, semiconductor element, through-electrodes, main surface wiring lines, wiring line electrodes, and joining members, where the wiring line electrodes are sized differently to ensure proper alignment and contact during the mounting process, reducing the likelihood of connection failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the wiring body structure is simplified for ease of manufacture, then manufacturing complexity is reduced, but connection reliability between semiconductor element and wiring body deteriorates
Solution Approach 1:
The patent applies local quality by creating different electrode sizes at specific locations on the wiring body. The first wiring line electrode has a larger area than the second wiring line electrode, providing enhanced connection reliability at the first connection position where it contacts the semiconductor element. This localized variation in electrode geometry ensures robust connections without requiring the entire wiring body to be overly complex.
Solution Approach 2:
The patent employs asymmetry by designing the first wiring line electrode with a larger area compared to the second wiring line electrode. This asymmetric configuration creates distinct connection characteristics at different positions on the wiring body, allowing optimized connection reliability at each interface with the semiconductor element while maintaining overall manufacturing simplicity.
2Manufacturing precision
If the wiring line electrodes are made uniform in size, then manufacturing precision requirements are reduced, but mounting alignment accuracy deteriorates
Solution Approach 1:
The patent implements local quality by varying the size of wiring line electrodes based on their specific functional requirements. The first wiring line electrode is designed with a larger area to provide a broader target for mounting alignment at its position, while the second wiring line electrode has a smaller area suited to its location. This localized differentiation improves mounting alignment accuracy without imposing uniform high precision requirements across all electrodes.
Solution Approach 2:
The asymmetric design of the wiring line electrodes, with the first electrode being larger than the second, creates distinct alignment references at different positions. This asymmetry enhances mounting alignment accuracy by providing appropriately sized targets for each connection point, allowing for more precise positioning during the mounting process while maintaining reasonable manufacturing precision standards.
Data Source
AI summary
This semiconductor device comprises a substrate, a first wiring part, a second wiring part, and a semiconductor element. The first wiring part includes a first through-electrode, first main-surface wiring, and a first wiring electrode. The second wiring section includes a second through-electrode, second main-surface wiring, and a second wiring electrode. An upper surface is depressed toward the interior of the first through-electrode. The first wiring electrode is joined to a first element electrode of the semiconductor element by a first joining member. The second wiring electrode is joined to a second element electrode of the semiconductor element by a second joining member. The first wiring electrode, which is formed on an upper surface of the first main-surface wiring, is larger than the second wiring electrode, which is formed on an upper surface of the second main-surface wiring, as seen from the thickness direction.