Semiconductor Electrode Depth Variation for Multi-Patterning Color Balance

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Solution Overview

Problem

The reliability of semiconductor devices is compromised due to the degradation caused by the miniaturization of pattern line widths in multi-patterning processes, leading to imbalance in color patterns which affects the fabrication of capacitors and other elements.

Innovation Solution

A semiconductor device design featuring a dielectric layer with alternating first and second electrodes, where the electrodes have portions of different depths and extensions, and a method for fabricating the device using multiple color patterns to improve color balance and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multi-patterning is used to reduce pattern line widths for high integration, then device density is improved, but reliability is degraded due to color pattern imbalance

Engineering Contradiction:
Improvedevice densityVSAvoiddevice reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by differentiating the treatment of first and second color patterns in the layout design. Specifically, the first color pattern (corresponding to the first electrode) is designed with different geometric characteristics than the second color pattern (corresponding to the second electrode), allowing each to be optimized for its specific function while maintaining overall color balance in the multi-patterning process

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs asymmetry by intentionally creating asymmetric layout designs for the first and second electrodes. The first electrode layout is designed with specific shape characteristics that differ from the second electrode layout, creating an asymmetric color pattern distribution that compensates for the inherent biases in the multi-patterning process and achieves better color balance

Inventive Principle:
Principle #4Asymmetry

2Productivity

If pattern line widths are greatly reduced for high integration, then device density is improved, but manufacturing precision is degraded

Engineering Contradiction:
Improvedevice densityVSAvoidpattern width precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by modifying the geometric parameters of the electrode layouts at the design stage. By adjusting the shapes, sizes, and spatial arrangements of the first and second electrodes in the layout design, the patent optimizes the color pattern balance to compensate for process variations inherent in multi-patterning, thereby maintaining manufacturing precision even at reduced line widths

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10396030B2Semiconductor device, layout design method for the same and method for fabricating the same
Publication Date: 2019.08.27 SAMSUNG ELECTRONICS CO LTD
  • US10396030B2 patent drawing
  • US10396030B2 patent drawing
  • US10396030B2 patent drawing

AI summary

A semiconductor device includes a first electrode which includes a first main portion, and a first extension that extends from the first main portion, and a dielectric layer which surrounds a sidewall and a bottom surface of the first main portion, wherein the first main portion includes a first portion having a first depth, and a second portion having a second depth deeper than the first depth.