Semiconductor Device Electrode Positioning for Thermal Stress Reduction
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Solution Overview
Problem
The existing double-sided mounting structures for power semiconductors using Pb-free materials face challenges with stress and reliability due to thermal expansion differences, leading to potential cracking and reduced performance in handling large currents and heat dissipation.
Innovation Solution
A semiconductor device design with a gate electrode on one surface and electrodes connected in a manner that aligns their end portions vertically, reducing thermal stress by balancing the connection lengths and areas, thereby using a highly elastic Pb-free material effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If Pb-free joining material is used to connect electrodes to semiconductor element surfaces, then environmental compatibility is improved, but thermal stress and cracking risk increase due to high elasticity and thermal expansion differences
Solution Approach 1:
The patent applies beforehand cushioning by designing the electrode connection structure to anticipate and compensate for thermal stress. The electrodes are positioned with their end portions inside the semiconductor element surfaces, creating a buffer zone that absorbs thermal expansion differences before stress can propagate to the element edges, thereby preventing cracking while using Pb-free materials.
Solution Approach 2:
The patent applies local quality by differentiating the connection configuration at different locations. The electrodes are selectively positioned inside the semiconductor element surfaces at specific connection regions, creating localized stress distribution patterns that protect vulnerable areas while maintaining effective electrical connection where needed.
2Area of stationary object
If electrodes are connected at the end portions of semiconductor element surfaces, then connection area is maximized for high current handling, but stress concentration increases leading to cracking
Solution Approach 1:
The patent applies inversion by reversing the conventional connection approach. Instead of connecting electrode end portions to the outer end portions of semiconductor element surfaces (which maximizes connection area but concentrates stress), the electrodes are positioned inside the semiconductor element surfaces. This inverted configuration distributes stress internally while maintaining adequate connection area for high current handling.
3Reliability
If connection end portions are positioned inside semiconductor element surfaces, then stress is reduced preventing cracking, but connection area is decreased
Solution Approach 1:
The patent applies parameter changes by optimizing the positional parameters of electrode connections. The end portions of electrodes are positioned inside the semiconductor element surfaces at specific distances from the edges, changing the geometric parameters to achieve an optimal balance between stress reduction (improving reliability) and maintaining sufficient connection area for high current handling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the reliability and heat dissipation capabilities of the semiconductor device, reducing the risk of cracking and ensuring high performance even with highly elastic Pb-free materials.
Implementation Method 1
thermal expansion differences
Implementation Method 2
stress generated in a semiconductor element
Implementation Method 3
heat dissipation
Data Source
AI summary
Provided is a highly reliable semiconductor device capable of reducing stress generated in a semiconductor element even when a highly elastic joining material such as a Pb-free material is used in a power semiconductor having a double-sided mounting structure. The semiconductor device includes a semiconductor element including a gate electrode only on one surface, an upper electrode connected to the surface of the semiconductor element on which the gate electrode is provided, and a lower electrode connected to a surface opposite to the surface of the semiconductor element on which the gate electrode is provided. A connection end portion of the upper electrode with the surface of the semiconductor element on which the gate electrode is provided is located inside an end portion of the surface of the semiconductor element on which the gate electrode is provided, and a connection end portion of the lower electrode with the opposite surface of the semiconductor element is located inside an end portion of the opposite surface of the semiconductor element.


