Semiconductor Device Electrode Configuration for Terminal Field Control

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Solution Overview

Problem

Semiconductor devices with super junction structures face challenges in maintaining high breakdown voltage due to electric field concentration in the terminal region, which can lead to decreased performance and reliability.

Innovation Solution

The semiconductor device incorporates a specific electrode configuration, including a first electrode with distinct portions connected to both the n-type semiconductor layer and the source region, which helps to suppress electric field concentration in the terminal region by maintaining equal potential and reducing field extension, thereby enhancing breakdown voltage and avalanche energy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the super junction structure is provided in the terminal region, then the electric field spreads into the terminal region easily and the concentration of the electric field in the element region is suppressed, but the electric field may concentrate in the terminal region and the breakdown voltage may decrease

Engineering Contradiction:
Improvebreakdown voltageVSAvoidelectric field concentration in terminal region
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A third semiconductor region of the second conductivity type is introduced as an intermediary between the second semiconductor regions (super junction structure) and the first semiconductor layer (n-type drift layer). This intermediate region acts as a buffer that prevents direct electric field concentration at the terminal region while maintaining the benefits of the super junction structure, thereby resolving the contradiction between electric field spreading and breakdown voltage maintenance

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies different doping concentrations and conductivity types to different regions: the third semiconductor region has a specific doping concentration that is lower than the second semiconductor regions but higher than the first semiconductor layer. This localized differentiation of electrical properties allows the terminal region to have different electric field characteristics from the element region, preventing harmful field concentration while maintaining overall device performance

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively increases the breakdown voltage and suppresses electric field concentration in the terminal region, reducing the likelihood of leakage current and maintaining device performance even under manufacturing fluctuations.

Implementation Method 1

the electric field spreads into the terminal region easily; and the concentration of the electric field in the element region is suppressed

Methodology Applied
Scientific EffectElectric field: Electric Field

Implementation Method 2

By using the super junction structure, it is possible to increase the effective doping concentration of the drift layer

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 3

increases the breakdown voltage and suppresses electric field concentration in the terminal region, reducing the likelihood of leakage current and maintaining device performance

Methodology Applied
Scientific EffectAvalanche breakdown: Avalanche Breakdown

Data Source

PatentUS9496334B2Semiconductor device
Publication Date: 2016.11.15 KK TOSHIBA
  • US9496334B2 patent drawing
  • US9496334B2 patent drawing
  • US9496334B2 patent drawing

AI summary

A semiconductor device according to an embodiment includes a first semiconductor layer of a first conductivity type, second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the first conductivity type, a gate electrode, an insulating layer, and a first electrode. The first semiconductor layer includes first semiconductor regions. The second semiconductor regions are provided respectively between the first semiconductor regions. The insulating layer is provided between the gate electrode and the third semiconductor region. The first electrode includes a first portion and a second portion. The first portion is connected to the first semiconductor region. The second portion is provided on the fourth semiconductor region side of the first portion. The first electrode is provided on the first semiconductor region and on the second semiconductor region. The first electrode is provided around the fourth semiconductor region.