Semiconductor Electrode Formation via Wet Etching
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Solution Overview
Problem
In the formation of semiconductor devices with multiple layers, achieving efficient electrical isolation and connection between layers is challenging, particularly in obtaining process margin and efficiency during conductor formation.
Innovation Solution
A method involving the formation of a semiconductor pattern on a substrate, followed by an interlayer insulating layer with openings, a semiconductor ohmic pattern, an electrode ohmic layer, and performing wet etching to form electrode patterns, which simplifies the process and prevents defects like seams in the electrode formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional photolithography and etching steps are used to form electrode patterns, then manufacturing precision can be maintained, but process complexity and time increase
Solution Approach 1:
The patent extracts and eliminates the photolithography and etching steps from the conventional electrode formation process. Instead of using photoresist coating, patterning, and etching, the invention directly forms electrode patterns through a simplified deposition and lifting-off process, removing unnecessary process steps while maintaining manufacturing precision
Solution Approach 2:
The patent performs preliminary actions by pre-forming the electrode material layer and using a sacrificial layer that defines the final pattern. The sacrificial layer is removed after deposition, leaving the electrode pattern already formed, which eliminates the need for subsequent photolithography and etching steps
2Manufacturing precision
If multiple process steps are used to form conductors, then manufacturing precision can be maintained, but process damage increases
Solution Approach 1:
The electrode patterns are formed in advance through deposition on a sacrificial layer, before any potentially damaging etching processes. This preliminary formation of the final pattern structure avoids subsequent etching steps that could cause process damage to the electrode material
Solution Approach 2:
The patent replaces the mechanical/chemical etching process with a deposition-based approach. Instead of removing material through etching, the electrode material is deposited conformally and then the sacrificial layer is removed, leaving the patterned electrode intact without etching-induced damage
3Reliability
If conventional electrode formation methods are used, then electrical connection can be established, but contact characteristics deteriorate due to process damage
Solution Approach 1:
The electrode patterns are formed in advance with proper material deposition and annealing processes that optimize contact characteristics. By forming the electrode pattern before any subsequent processing, the contact interfaces are established in their optimal state without later damage
Solution Approach 2:
The patent replaces etching-based electrode formation with a deposition-based approach that preserves material integrity and contact quality. The conformal deposition followed by sacrificial layer removal creates clean, damage-free contact interfaces that maintain excellent electrical characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method minimizes process damage, enhances contact characteristics, and maximizes process efficiency by eliminating the need for additional photolithography and etching steps, while ensuring effective electrical connection and isolation between semiconductor layers.
Implementation Method 1
performing a wet etching on the electrode ohmic layer
Data Source
AI summary
Provided are a semiconductor device and a method of forming the semiconductor device. The method may include forming a semiconductor pattern on a substrate, forming an interlayer insulating layer including an opening exposing the semiconductor pattern, forming a semiconductor ohmic pattern on the semiconductor pattern, forming an electrode ohmic layer on the semiconductor ohmic pattern, performing a wet etching on the electrode ohmic layer, and forming an electrode pattern on the etched electrode ohmic layer.