Semiconductor Device Electron Trap Layer Threshold Voltage Control

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Solution Overview

Problem

As semiconductor devices miniaturize, they experience deterioration in electrical characteristics such as on-state current, off-state current, threshold voltage, and subthreshold swing, leading to increased power consumption and reduced reliability, with challenges in maintaining data retention when power is stopped.

Innovation Solution

Incorporating an electron trap layer between the gate electrode and the semiconductor layer, formed using materials like hafnium oxide, aluminum oxide, or tantalum oxide, with conductive minute regions, and employing heat treatment to trap electrons, which adjusts the threshold voltage and improves electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the transistor channel length is shortened to increase integration density, then the on-state current increases, but the off-state current increases and threshold voltage variation worsens

Engineering Contradiction:
Improveintegration densityVSAvoidelectrical characteristics stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

An electron trap layer is introduced as an intermediary between the gate electrode and the oxide semiconductor layer. This trap layer captures excess electrons that would otherwise cause threshold voltage shifts and off-state current increases, thereby mediating the adverse effects of channel length shortening while maintaining high integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The electron trap layer is pre-formed in the gate insulating film before transistor operation. This preliminary structure is designed to capture electrons during device fabrication and operation, preventing threshold voltage degradation before it occurs and ensuring stable electrical characteristics from the outset

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the transistor channel width is decreased to increase integration density, then the transistor size decreases, but the on-state current decreases

Engineering Contradiction:
Improveintegration densityVSAvoidon-state current
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

The invention changes the electrical parameters of the gate insulating film by incorporating an electron trap layer with specific trapping characteristics. This allows the transistor to maintain higher on-state current at reduced channel widths by controlling electron distribution and preventing excessive carrier accumulation in the channel

Inventive Principle:
Principle #35Parameter changes

3Reliability

If heat treatment is performed to trap electrons in the electron trap layer, then the threshold voltage is adjusted, but additional process steps are required

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidmanufacturing process steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The electron trap layer is formed by combining materials during the gate insulating film deposition process itself, rather than as a separate subsequent step. The heat treatment for electron trapping is merged with existing annealing processes in the fabrication sequence, reducing overall process complexity while achieving threshold voltage control

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively adjusts threshold voltage, prevents deterioration of electrical characteristics, enhances integration density, reduces power consumption, and allows data retention even when power is stopped, thereby improving the reliability and performance of semiconductor devices.

Implementation Method 1

trapping an electron in the electron trap layer by performing heat treatment at higher than or equal to 125° C. and lower than or equal to 450° C.

Methodology Applied
Scientific EffectElectron trapping:

Implementation Method 2

performing heat treatment at higher than or equal to 125° C. and lower than or equal to 450° C.

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Data Source

PatentUS10074733B2Semiconductor device and method for manufacturing semiconductor device
Publication Date: 2018.09.11 SEMICON ENERGY LAB CO LTD
  • US10074733B2 patent drawing
  • US10074733B2 patent drawing
  • US10074733B2 patent drawing

AI summary

A manufacturing method of a semiconductor device in which the threshold voltage is adjusted is provided. The semiconductor device includes a first semiconductor, an electrode electrically connected to the first semiconductor, a gate electrode, and an electron trap layer between the gate electrode and the first semiconductor. By performing heat treatment at higher than or equal to 125° C. and lower than or equal to 450° C. and, at the same time, keeping a potential of the gate electrode higher than a potential of the electrode for 1 second or more, the threshold voltage is increased.