Semiconductor Element Thickness Optimization for Solder Stress Reduction
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Solution Overview
Problem
Semiconductor devices with thick semiconductor elements experience stress and reliability issues due to heat expansion, leading to peeling and wire breakage at the solder interface, especially when operated over extended periods.
Innovation Solution
A semiconductor device design featuring semiconductor elements with a thickness of 50 μm or greater and less than 100 μm mounted on metal foils through a solder layer, with a wetting suppression layer or selective solder material arrangement to minimize stress and improve bonding reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If thick semiconductor elements (100 μm or greater) are used, then power handling capability is improved, but stress between semiconductor elements and solder layers increases causing peeling and wire breakage
Solution Approach 1:
The patent changes the thickness parameter of semiconductor elements from conventional 100 μm or greater to a specific range of 50 μm to less than 100 μm. This parameter optimization reduces thermal expansion stress while maintaining adequate power handling capability, preventing peeling at the semiconductor-solder interface and wire breakage during repeated operation cycles
2Reliability
If semiconductor elements with thickness 50 μm or greater and less than 100 μm are used, then stress between semiconductor elements and solder layers is reduced, but power handling capability may be compromised
Solution Approach 1:
The patent identifies and applies an optimal thickness range (50 μm ≤ thickness < 100 μm) that balances two competing requirements: reducing thermal expansion stress to improve power cycle tolerance while maintaining sufficient power handling capability. This parameter optimization resolves the contradiction by finding the sweet spot where both reliability and power performance are satisfied
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design significantly reduces stress between semiconductor elements and solder layers, enhancing power cycle tolerance and maintaining high reliability over extended use, preventing peeling and wire breakage.
Implementation Method 1
at least one semiconductor element which is mounted onto the second metal foil through a solder layer
Data Source
AI summary
A semiconductor device includes a first metal foil, an insulating sheet mounted on an upper surface of the first metal foil main, at least one second metal foil mounted on the insulating sheet, at least one solder layer mounted on the at least one second metal foil, and at least one semiconductor element mounted on the at least one second metal foil through the at least one solder layer. The at least one semiconductor has a thickness of 50 μm or greater and less than 100 μm.