Semiconductor Device Embedded Capacitor Trench Noise Suppression
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Solution Overview
Problem
In semiconductor devices with snubber circuits, the placement of capacitors reduces the allowable current in the active region and generates noise during turn-off due to parasitic inductance, necessitating a solution that maintains current flow and noise suppression without sacrificing active region space.
Innovation Solution
A semiconductor device configuration featuring a capacitor region integrated within the semiconductor layer using embedded electrodes and trenches, allowing parallel connection to the current path and minimizing warpage, with a capacitor formed by a second embedded electrode and the semiconductor layer, effectively utilizing the surface electrode layer for both active and capacitor functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a capacitor is arranged in a region on the side of a gate pad to suppress noise during turn-off, then noise suppression is improved, but the active region area is reduced which decreases the allowable current capacity
Solution Approach 1:
The invention transitions from a planar arrangement where the capacitor occupies lateral space to a vertical arrangement where the capacitor is formed by embedding electrodes within the thickness of the semiconductor layer. The first embedded electrode is positioned in a first trench and the second embedded electrode is positioned in a second trench, with the capacitor formed between these electrodes along the vertical dimension. This allows the capacitor to coexist with the active region in the planar view, thus suppressing noise without reducing the active region area.
2Reliability
If the semiconductor layer thickness is increased to accommodate embedded electrodes and trenches, then capacitor functionality is improved, but manufacturing complexity and warpage risk increase
Solution Approach 1:
The invention optimizes the thickness of the semiconductor layer to a specific range (10-20 μm) that balances multiple requirements: it is thick enough to accommodate the embedded electrodes and trenches while maintaining structural integrity, but not so thick as to cause excessive warpage or manufacturing difficulty. This parameter optimization allows the capacitor to function effectively without overly complicating the manufacturing process or increasing warpage risk.
3Adaptability or versatility
If trenches are formed to embed electrodes for the capacitor, then capacitor integration is improved, but the structural integrity and warpage resistance of the semiconductor layer deteriorate
Solution Approach 1:
The invention applies local quality by forming trenches only in specific regions where the capacitor is needed, rather than throughout the entire semiconductor layer. The first trench contains the first embedded electrode and the second trench contains the second embedded electrode, with insulating films applied selectively to the inner surfaces of these trenches. This localized approach allows capacitor integration while preserving the overall structural integrity of the semiconductor layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances current capacity and suppresses noise during turn-off while preventing warpage and maintaining the active region's current capacity, allowing for efficient high-speed switching operations without reducing the active region's current handling capability.
Implementation Method 1
a capacitor constituted by the second embedded electrode and a portion of the semiconductor layer facing each other with the second insulating film interposed therebetween is formed in the capacitor region
Data Source
AI summary
A semiconductor device includes: semiconductor layer having surface and rear surface; insulating film formed on the surface; first and second surface electrode layers formed on the insulating film; rear electrode layer formed on the rear surface; active region set in region of the surface covered with the first surface electrode layer; capacitor region set in region of the surface covered with the second surface electrode layer; first trench formed in the active region; first insulating film formed on inner surface of the first trench; first embedded electrode embedded in the first trench and controlling ON/OFF of current flowing between the first surface electrode layer and the rear electrode layer; second trench formed in the capacitor region; second insulating film formed on inner surface of the second trench; and second embedded electrode embedded in the second trench and electrically connected to the first surface electrode layer.