Semiconductor EMC Evaluation Using Difference Correction Values
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Solution Overview
Problem
Current methods for evaluating the electromagnetic compatibility (EMC) of semiconductor integrated circuits are inefficient, requiring complex calculations and lengthy processes to achieve compliance with standard values, often resulting in inaccuracies and high computational costs.
Innovation Solution
A method utilizing data assimilation techniques, specifically Bayes' theorem, to calculate EMC characteristics by comparing measured and calculated values, incorporating difference correction values to refine predictions and reduce computational complexity, focusing on specific components like semiconductor integrated circuits and printed circuit boards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional EMC evaluation methods are used, then comprehensive verification is achieved, but evaluation time and computational cost increase significantly
Solution Approach 1:
The patent segments the EMC evaluation process into two distinct phases: (1) an initial comprehensive evaluation phase that establishes baseline EMC characteristics, and (2) a subsequent simplified evaluation phase that uses difference correction values to assess changes. This segmentation allows the full verification to be performed only once, while later evaluations use the simplified method, thereby reducing repeated computational overhead while maintaining reliability.
Solution Approach 2:
The patent performs preliminary action by conducting a complete EMC evaluation first to establish reference data and difference correction values. These pre-computed values are then reused in subsequent evaluations, eliminating the need to repeat the entire comprehensive analysis and significantly reducing evaluation time for design iterations.
2Measurement precision
If comprehensive EMC calculations are performed, then accurate compliance verification is achieved, but computational complexity increases
Solution Approach 1:
The patent extracts and stores difference correction values (ΔS11, ΔS21, etc.) from the initial comprehensive EMC evaluation. These extracted values capture the essential EMC characteristics and are then applied to subsequent simplified evaluations, allowing accurate compliance verification without repeating the complex full-calculation process.
Solution Approach 2:
The patent creates a simplified model by copying the essential EMC characteristics from the comprehensive evaluation into difference correction values. This copied data serves as a reference that can be quickly applied to assess design changes without performing the full complex calculations again, maintaining measurement precision while reducing computational complexity.
3Reliability
If repeated full EMC evaluations are conducted for design iterations, then compliance is verified, but evaluation efficiency decreases
Solution Approach 1:
The patent performs the computationally intensive comprehensive EMC evaluation as a preliminary action that establishes baseline data. Subsequent design iterations then use this pre-computed reference data with simple difference calculations, enabling rapid compliance verification without sacrificing reliability. This approach transforms a repeated high-cost process into a one-time high-cost operation followed by multiple low-cost operations.
Solution Approach 2:
The patent changes the evaluation parameters from full comprehensive analysis to difference-based analysis for iterative design. By computing only the differences (ΔS-parameters) rather than full S-parameters repeatedly, the method maintains compliance verification reliability while dramatically improving evaluation efficiency for design iterations.
Data Source
AI summary
A semiconductor integrated circuit evaluation method includes an initial setting flow for obtaining a difference correction value from a measured value and a calculated value of unwanted radiation in a semiconductor integrated circuit before implementation of an electromagnetic compatibility countermeasure, and a calculated prediction flow for obtaining a calculated value of unwanted radiation in a semiconductor integrated circuit after implementation of an electromagnetic compatibility countermeasure, correcting the calculated value with the difference correction value, and evaluating whether or not a corrected calculated value conforms to a standard. The initial setting flow and the calculated prediction flow respectively include a step of applying noise elimination processing to the measured value and the calculated value of the unwanted radiation.