Semiconductor Die Encapsulation Spacer with Apertures
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Solution Overview
Problem
Conventional semiconductor die encapsulation methods using cavity moulds face issues such as bond wire dislodgment due to high pressure, complex and costly tooling, and the need for frequent cleaning, which hinder productivity and void-free encapsulation.
Innovation Solution
A system that eliminates the use of cavity moulds by employing a simple encapsulation spacer with apertures and overflow reservoirs connected by air vents, allowing for encapsulant filling and curing without the need for high-pressure injection, using a small press with a platen and pressure plate, and optionally a unitary or multi-layer design for improved configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional cavity moulds are used for encapsulation, then encapsulation can be achieved, but bond wires may be dislodged or moved into contact with adjacent bond wires due to high pressure
Solution Approach 1:
The patent extracts the encapsulation cavity from a complex cavity mould system and implements it using a simple encapsulation spacer with through-apertures. This eliminates the need for high-pressure injection through complex mould channels, thereby preventing bond wire dislodgment while maintaining effective encapsulation.
Solution Approach 2:
The encapsulation spacer is designed as a simple, inexpensive component that can be easily replaced. Unlike expensive cavity moulds that require constant cleaning and maintenance, the spacer is a cost-effective solution that eliminates the need for frequent cleaning operations.
2Reliability
If conventional cavity moulds are used for encapsulation, then encapsulation can be achieved, but the moulds are expensive and require constant cleaning to remove encapsulant from channels
Solution Approach 1:
The patent extracts the encapsulation cavity function from complex cavity moulds and implements it through simple encapsulation spacers with through-apertures. This eliminates the complex internal channels that require constant cleaning, while maintaining effective encapsulation capability.
Solution Approach 2:
The encapsulation spacer is designed as a simple, inexpensive component without complex internal channels. This eliminates the need for constant cleaning operations required by traditional moulds, thereby improving productivity and reducing maintenance costs.
3Reliability
If conventional cavity moulds are used for encapsulation, then encapsulation can be achieved, but the tooling costs are high and productivity is reduced due to frequent cleaning
Solution Approach 1:
The patent extracts the encapsulation cavity from expensive cavity moulds and implements it using simple encapsulation spacers. This eliminates the need for frequent cleaning operations, thereby increasing production efficiency and productivity without sacrificing encapsulation effectiveness.
Solution Approach 2:
The encapsulation spacer is designed as a simple, cost-effective component that eliminates the need for constant cleaning. This reduces downtime and increases productivity while maintaining effective encapsulation, directly addressing the productivity issue caused by frequent mould cleaning.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces costs, minimizes bond wire dislodgment, eliminates the need for frequent cleaning, and enhances productivity by providing a cost-effective and void-free encapsulation method for semiconductor dies.
Implementation Method 1
allowing for encapsulant filling and curing without the need for high-pressure injection
Implementation Method 2
overflow reservoirs connected by air vents
Data Source
AI summary
The present invention describes two systems (100, 300) for encapsulation of semiconductor dies. Both systems (100, 300) involve attaching an encapsulation spacer (102, 302, 302a, 302b) having one or more apertures (104, 304) on an associated substrate (150) so that a group of chips is located within the aperture (104, 304). The first system (100) involves dispensing encapsulant (103) directly into an aperture. The second system (300) involves attaching an encapsulant delivery layer (350, 351) onto the encapsulation spacer and discharging encapsulant into an aperture via a recessed gate (308).