Encapsulation Thickness Layout in Semiconductor Packages to Limit Warpage
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Solution Overview
Problem
Electronic devices experience structural reliability issues due to warpage caused by mismatched properties of encapsulation layer materials, leading to cracks during separation from carrier substrates.
Innovation Solution
The design involves an encapsulation layer with a thickness greater than the semiconductor components, where the thickness difference is between half and three times the semiconductor thickness, and the sum of the semiconductor areas exceeds half of the encapsulation area, reducing warpage and cracking risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the encapsulation layer thickness is increased to reduce warpage, then structural reliability is improved, but manufacturing complexity and material consumption increase
Solution Approach 1:
The patent applies parameter changes by precisely controlling the encapsulation layer thickness within a specific range (greater than the semiconductor component thickness but not excessively thick). This optimized thickness parameter reduces warpage-induced stress and improves structural reliability while avoiding the manufacturing complexity and material waste associated with excessive thickness. The solution transforms the qualitative goal of 'reducing warpage' into a quantitative parameter control strategy.
2Reliability
If the encapsulation layer thickness is increased to prevent cracks during separation, then reliability is improved, but material consumption and cost increase
Solution Approach 1:
The patent employs parameter changes by establishing an optimal thickness range for the encapsulation layer. The thickness is controlled to be greater than the semiconductor component thickness to provide sufficient support during separation, preventing cracks. However, it is deliberately kept from being excessively thick to minimize material consumption and cost. This quantitative parameter optimization resolves the contradiction between crack resistance and material efficiency.
3Stability of the object's composition
If the semiconductor components occupy larger area within the encapsulation layer, then warpage is reduced, but design flexibility decreases
Solution Approach 1:
The patent applies parameter changes by controlling the area ratio of semiconductor components within the encapsulation layer. By ensuring that the semiconductor components occupy a sufficient area within the encapsulation layer, the patent reduces warpage through improved structural distribution. At the same time, the design maintains flexibility by not imposing excessive area constraints, allowing adaptability for different component layouts and design requirements within reasonable bounds.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances structural reliability by minimizing warpage-induced cracks in the encapsulation layer, ensuring better package structure integrity.
Implementation Method 1
The encapsulation layer has a first thickness, and the first semiconductor component has a second thickness. The first thickness is greater than the second thickness. A difference between the first thickness and the second thickness is greater than half of the first thickness and less than three times the second thickness.
Data Source
AI summary
An electronic device includes a first semiconductor component, a second semiconductor component, an encapsulation layer, and a circuit layer. The encapsulation layer has a first side, and the encapsulation layer surrounds the first semiconductor component and the second semiconductor component. The circuit layer is disposed on the first side of the encapsulation layer. The encapsulation layer has a first thickness, and the first semiconductor component has a second thickness. The first thickness is greater than the second thickness. A difference between the first thickness and the second thickness is greater than half of the first thickness and less than three times the second thickness. In a top view, the encapsulation layer has a first area, the first semiconductor component has a second area, the second semiconductor component has a third area, and a sum of the second area and the third area is greater than half of the first area.


