Semiconductor Packaging Envelope for Electrical Short Resistance
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Solution Overview
Problem
Fan-out packaged semiconductor devices are less resistant to electrical shorts, particularly under high voltage pulses such as ESD events, due to cracks in the passivation layer and direct contact between external electrodes and the semiconductor substrate.
Innovation Solution
A protective envelope is extended between the passivation layer and the external electrodes, forming an additional electrically isolating barrier to prevent cracks and direct contact, using a material with higher elasticity than the semiconductor substrate and passivation layer, and applying a surface treatment to ensure proper wetting and contact angles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the protective envelope is extended between the passivation layer and external electrodes, then resistance to electrical shorts is improved, but device complexity increases
Solution Approach 1:
The protective envelope is extended in a new spatial dimension by making it protrude laterally beyond the side face of the semiconductor device. This dimensional extension creates an additional protective zone between the external electrodes and the substrate without requiring additional layers or complex multi-step processes, thereby improving electrical short resistance while controlling complexity.
Solution Approach 2:
The protective envelope is formed to protrude laterally before the external electrodes are applied to the device. This preliminary action pre-establishes the protective barrier, preventing direct contact between the electrodes and substrate from occurring in the first place, thus enhancing reliability against electrical shorts.
2Reliability
If a protective envelope is used to prevent cracks in passivation layer, then reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The protective envelope is formed as a flexible encapsulating structure that can conform to the semiconductor device geometry. This flexible film approach allows the envelope to naturally follow the device contours and provides crack protection through its inherent flexibility and stress-absorbing properties, while the forming process achieves sufficient precision without requiring ultra-precise manufacturing controls.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the resistance to electrical shorts, improves reliability under high current and voltage conditions, and reduces the risk of unwanted electrical contact, while also providing improved mechanical robustness against shocks and thermomechanical stress.
Implementation Method 1
using a material with higher elasticity than the semiconductor substrate and passivation layer
Implementation Method 2
applying a surface treatment to ensure proper wetting and contact angles
Data Source
AI summary
Packaged semiconductor product (2) including a first semiconductor device (4A) and a packaging structure with a protective envelope (6) and a first and second external electrode (8,10). The first semiconductor device (4A) has a first substrate (11A) and is provided with a first passivation layer (12A) and a first electronic structure. The first substrate has a first main surface (14). The first substrate (11A) is embedded in the protective envelope (6) and the first main surface (14) faces a first opening (23) of the protective envelope (6). The first electronic structure has a first and a second contact region (20, 22) for electrically contacting the first electronic structure. The first passivation layer (12A) substantially covers the first main surface (14) and the first electronic structure. The protective envelope (6) extends between the first passivation layer (12A) and the first external electrode (8) towards the first contact region (20).