Semiconductor Error Scrub Control Circuit for Dynamic Refresh Cycle Adjustment

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Solution Overview

Problem

As semiconductor devices increase data processing speed, the likelihood of data errors during transmission also rises, necessitating improved methods for error detection and correction, particularly during refresh operations.

Innovation Solution

A semiconductor system that includes error detection and scrub control circuits to generate and respond to error scrub control signals, adjusting the cycle time of error scrub operations based on error occurrence counts, ensuring reliable data transmission by selectively enabling first and second error scrub control signals according to error code logic levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data processing speed is increased, then operation speed is improved, but data error probability increases

Engineering Contradiction:
Improveoperation speedVSAvoiddata error probability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent performs error scrub operations preliminarily during refresh cycles before erroneous data can propagate and cause failures. By proactively detecting and correcting errors during scheduled refresh intervals, the system maintains data integrity without compromising the high-speed data processing capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The error detection circuit continuously monitors data during refresh operations and provides feedback through error codes to the control circuit. This feedback mechanism enables dynamic adjustment of error scrubbing intensity based on actual error conditions, ensuring reliability while minimizing impact on processing speed.

Inventive Principle:
Principle #23Feedback

2Reliability

If error scrub operation frequency is increased, then data reliability is improved, but performance degradation occurs

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent dynamically adjusts the error scrub operation frequency based on error code conditions. When error codes indicate high error rates, the control circuit increases scrubbing frequency; when error rates are low, it reduces frequency. This dynamic adaptation ensures optimal balance between reliability and performance under varying conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters (cycle time, scrub frequency) based on error code logic levels. By modifying these parameters dynamically rather than maintaining fixed high-frequency scrubbing, the system achieves high reliability when needed while preserving performance during normal operation.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If error detection and correction mechanisms are added, then data reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the error detection function with the existing refresh operation infrastructure. The error detection circuit is integrated into the refresh control logic, and error scrubbing utilizes the same memory access pathways as normal refresh operations. This consolidation achieves enhanced reliability without proportionally increasing device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The refresh operation serves multiple functions simultaneously: it maintains memory data integrity, performs error detection, and enables error correction. By making the refresh operation multi-functional rather than adding separate dedicated error handling circuits, the system improves reliability while minimizing complexity increase.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10613928B2Semiconductor devices and semiconductor systems including the same
Publication Date: 2020.04.07 SK HYNIX INC
  • US10613928B2 patent drawing
  • US10613928B2 patent drawing
  • US10613928B2 patent drawing

AI summary

A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device generates a first error scrub control signal and a second error scrub control signal according to a logic level combination of an error code including information on the error occurrence number of times. The second semiconductor device performs an error scrub operation of a memory area on a first cycle time in response to the first error scrub control signal during a refresh operation and performs the error scrub operation of the memory area on a second cycle time in response to the second error scrub control signal during the refresh operation.