Semiconductor Error Logging With Stress Correlation for Failure Analysis

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Solution Overview

Problem

Existing techniques for analyzing device failures focusing on cumulative stress may not effectively identify the type of error leading to failure, limiting the usefulness of analysis results, especially in high-reliability devices with functional safety mechanisms, where predictive maintenance data is crucial.

Innovation Solution

A semiconductor device with an analysis data storage unit that associates error information with stress accumulated values at the time of error occurrence, enabling more comprehensive analysis by storing this data for predictive maintenance, including both error-causing and non-error-causing stress data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If functional safety mechanisms are provided to prevent errors from occurring as failures, then device reliability is improved, but the ability to obtain useful analysis data for predictive maintenance deteriorates

Engineering Contradiction:
Improvedevice reliabilityVSAvoidanalysis data utility
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent applies preliminary action by storing error information and stress accumulated values in advance before failures occur. The analysis data storage unit continuously records error information (step S102) and stress accumulated values (step S105) during device operation, so that when a failure eventually occurs, comprehensive data is already available for predictive maintenance analysis, thus resolving the information loss caused by functional safety mechanisms preventing failures.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If only cumulative stress data is stored for failure analysis, then storage complexity is reduced, but the precision of error cause identification deteriorates

Engineering Contradiction:
Improvedata storage complexityVSAvoiderror cause identification precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent merges multiple data types into a unified analysis data storage unit. It combines error information (step S102) with stress accumulated values (step S105) into associated data structures (step S103), creating a comprehensive dataset that links specific errors with their corresponding stress levels. This merging enables precise error cause identification while maintaining manageable storage complexity through systematic data organization.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11068330B2Semiconductor device and analysis system
Publication Date: 2021.07.20 RENESAS ELECTRONICS CORP
  • US11068330B2 patent drawing
  • US11068330B2 patent drawing
  • US11068330B2 patent drawing

AI summary

The semiconductor device has a module having a predetermined function, an error information acquisition circuit for acquiring error information about an error occurring in the module, a stress acquisition circuit for acquiring a stress accumulated value as an accumulated value of stress applied to the semiconductor device, and an analysis data storage for storing analysis data as data for analyzing the state of the semiconductor device, the error information and the stress accumulated value at the time of occurrence of the error being associated with each other.