Semiconductor ESD Protection via Diode Breakdown Voltage Differentiation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices face challenges in maintaining Electrostatic Discharge (ESD) immunity with a simple configuration, especially when a negative voltage is inputted, as existing solutions require increasing the number of diodes, leading to larger layout regions.
Innovation Solution
A semiconductor device configuration that includes a power supply wiring, ground wiring, an input circuit, an input pad for negative voltage input, multiple first diodes between the ground and input pad, and a second diode between the input pad and power supply wiring, with the reverse bias breakdown voltage of the second diode being higher than that of the first diodes, allowing for ESD immunity without increasing the number of diodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of diodes is increased to handle negative voltage input, then ESD protection capability is improved, but the layout region increases
Solution Approach 1:
The patent applies parameter changes by setting different reverse bias breakdown voltage values for different diodes. Specifically, the first diode has a reverse bias breakdown voltage of 0.7V while the second diode has a reverse bias breakdown voltage of 3.3V. This parameter differentiation allows the diodes to handle different voltage ranges, enabling negative voltage protection without requiring additional diodes, thus maintaining compact layout while improving ESD protection capability.
2Adaptability or versatility
If the reverse bias breakdown voltage of the second diode is increased, then voltage range coverage is improved, but the diode selection becomes more constrained
Solution Approach 1:
The patent applies local quality by assigning different reverse bias breakdown voltage characteristics to different diodes based on their specific functional requirements. The first diode (between ground and input pad) uses a low breakdown voltage of 0.7V for clamping negative voltages, while the second diode (between input pad and power supply) uses a high breakdown voltage of 3.3V to handle positive voltage excursions. This localized optimization of diode parameters enables comprehensive voltage range coverage while maintaining ease of manufacture through standard diode selections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively maintains ESD immunity with a simple layout, reducing the number and area of diodes required, thus preventing excessive voltage from reaching internal circuits while minimizing circuit complexity.
Implementation Method 1
a reverse bias breakdown voltage of the second diode is greater than a reverse bias breakdown voltage of each of the first diodes
Data Source
AI summary
A semiconductor device that can hold ESD immunity with a simple configuration is provided.The semiconductor device includes a power supply wiring, a ground wiring, an input circuit coupled between the power supply wiring and the ground wiring, an input pad which is coupled with the input circuit and to which a negative voltage lower than a voltage supplied to the ground wiring can be inputted, a plurality of first diodes provided between the ground wiring and the input pad, and a second diode provided between the input pad and the power supply wiring. A reverse bias breakdown voltage of the second diode is greater than a reverse bias breakdown voltage of each of the first diodes.