Semiconductor ESD Structure with Floating Well Tie Connections
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Solution Overview
Problem
Conventional semiconductor structures for Electrostatic Discharge (ESD) protection lack the capability to uniformly trigger and distribute current across multiple fingers, leading to inadequate protection against high-voltage ESD events and transient effects such as single event radiation.
Innovation Solution
The semiconductor structure incorporates a plurality of voltage clamps, including Silicon-Controlled Rectifier (SCR) devices and Bipolar Junction Transistors (BJTs), connected in parallel with floating connections that virtually simultaneously trigger and conduct current across all clamps if any blocking junction breaks down, enhancing ESD protection by ensuring uniform triggering and current distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor structures are used for ESD protection, then the structure is simple, but the ESD protection capability is insufficient and current distribution is non-uniform
Solution Approach 1:
The semiconductor structure is divided into multiple fingers, each containing separate voltage clamps (SCR devices and BJTs). This segmentation allows current to be distributed across multiple parallel paths, enhancing ESD protection capability while maintaining manageable complexity through modular design
Solution Approach 2:
Multiple voltage clamps (SCR devices and BJTs) are connected in parallel within each finger, merging their protection capabilities. The floating connections merge the triggering mechanisms across all fingers, ensuring uniform current distribution and enhanced overall ESD protection
2Reliability
If multiple voltage clamps are used in parallel, then ESD protection capability increases, but the triggering uniformity across fingers deteriorates without floating connections
Solution Approach 1:
Floating connections are implemented to equalize the potential across all voltage clamps in parallel. By connecting the triggering nodes through high-impedance floating connections, all clamps experience the same triggering conditions, ensuring uniform current distribution across fingers while maintaining enhanced ESD protection capability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly increases ESD protection capability, making the semiconductor structure more rugged against Electrical Over-Stress (EOS) events and transient effects by uniformly triggering all fingers during an ESD event, providing enhanced protection compared to conventional devices.
Implementation Method 1
if any blocking junction breaks down
Data Source
AI summary
A semiconductor structure for enhanced ESD protection is disclosed. The semiconductor structure includes a plurality of fingers, wherein each finger of the plurality of fingers includes a plurality of voltage clamps, and each voltage clamp of the plurality of voltage clamps includes at least a first well having a first conductivity type and a second well having a second conductivity type, and a connection between a well tie of the first well of a first voltage clamp of the plurality of voltage clamps and a well tie of the first well of a second voltage clamp of the plurality of voltage clamps, wherein the connection is enabled to couple a bias voltage associated with a current flow in the first voltage clamp to the second voltage clamp, and the first voltage clamp and the second voltage clamp are thereby enabled to trigger on substantially simultaneously.