Semiconductor Device ESD Protection via Inter-Domain Power Clamps
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Solution Overview
Problem
Semiconductor devices with multiple domains face challenges in protecting signal paths from Electro-static discharge (ESD), leading to potential damage and erroneous operations, especially when power source lines are separated, and the use of existing ESD protection circuits is insufficient in managing the voltage variations across different circuits.
Innovation Solution
A semiconductor device design that includes separate power clamp circuits and relay circuits between domains, with level shifters connected to both high and low power source lines, to effectively manage ESD and voltage differences, utilizing power rail clamps and CDM protection circuits to prevent transistor gate destruction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate power source lines are provided for each domain to protect against ESD, then reliability is improved, but device complexity increases
Solution Approach 1:
A third power clamp circuit is introduced as an intermediary protection mechanism between domains. This additional clamp circuit acts as a mediator that provides ESD protection for signal paths crossing between domains with different power source voltages, without requiring complete separation of all power source lines throughout the entire device.
Solution Approach 2:
Instead of uniformly separating all power source lines throughout the entire device, the invention applies ESD protection locally at specific critical points where signal paths cross between domains. The third power clamp circuit is strategically placed only where needed to protect inter-domain signal paths, rather than implementing global power source line separation.
2Use of energy by moving object
If power source voltage is reduced to achieve low power consumption, then energy efficiency is improved, but manufacturing precision requirements increase due to process variation
Solution Approach 1:
The invention changes the voltage parameter dynamically by providing multiple power source voltage options (1.8V, 1.5V, 1.2V) for the third power clamp circuit. This allows the system to adapt voltage levels based on process variations and operational requirements, enabling low power consumption while maintaining reliability across different manufacturing conditions.
3Reliability
If a third power clamp circuit is added between second high power source line and first low power source line, then ESD protection is improved, but device complexity increases
Solution Approach 1:
The ESD protection function is segmented into multiple independent clamp circuits distributed across different domains. Each clamp circuit (first, second, and third) operates independently to protect specific power source lines and signal paths, allowing modular protection that can be implemented and maintained separately rather than as a single complex system.
Data Source
AI summary
A semiconductor device includes: a first domain including a first high power source line, a first low power source line, and a first power clamp circuit; a second domain including a second high power source line, a second low power source line, and a second power clamp circuit; a third power clamp circuit provided between the second high power source line and the first low power source line; a first relay circuit that receives a signal from the first domain and outputs the signal to the second domain; and a second relay circuit that receives a signal from the second domain and outputs the signal to the first domain, wherein the first relay circuit and the second relay circuit have a circuit portion that is connected to the second high power source line and the first low power source line.