Semiconductor Device ESD Protection via Parasitic Diodes

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Solution Overview

Problem

As semiconductor devices shrink in size, existing ESD circuits become challenging to miniaturize due to the need for large diodes and resistors, leading to inefficiencies in protecting internal circuits from electrostatic discharge (ESD) without causing data loss during operations.

Innovation Solution

The semiconductor device employs a data transfer unit with MOS transistors and dummy MOS transistors to form parasitic diodes between the input/output pad and power supply terminals, allowing for controlled discharge of ESD, reducing the need for separate ESD circuit components and enabling efficient ESD protection without affecting data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional ESD circuits with large diodes and resistors are used, then ESD protection capability is improved, but device area increases

Engineering Contradiction:
ImproveESD protection capabilityVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines the ESD protection function with the existing data transfer unit by utilizing parasitic diodes formed by MOS transistors. The dummy MOS transistors are merged into the data transfer path, allowing the same circuit structure to serve both data transmission and ESD protection functions, thereby eliminating the need for separate ESD protection components and reducing overall device area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The data transfer unit is designed to perform multiple functions: normal data transfer through MOS transistors and ESD protection through parasitic diodes. The dummy MOS transistors serve dual purposes as both data transfer elements and ESD protection elements, making the circuit universal and reducing the total component count and area required.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If resistor value is increased to drop ESD voltage, then ESD protection is improved, but data loss occurs during data input/output operation

Engineering Contradiction:
ImproveESD voltage dropping capabilityVSAvoiddata loss
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent replaces the traditional resistor-based voltage dropping mechanism with a diode-based clamp mechanism. Instead of using a high-value resistor to drop ESD voltage (which causes data loss), the parasitic diodes clamp the voltage to a safe level during ESD events while maintaining low resistance during normal data operations, thus preventing data loss.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The ESD protection mechanism dynamically changes its electrical characteristics based on operating conditions. During normal data operations, the parasitic diodes remain reverse-biased and present high impedance, allowing seamless data transfer. During ESD events, the diodes become forward-biased and provide low-impedance clamping paths, effectively dropping ESD voltage without affecting data signals.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the area occupied by ESD protection circuits by up to 30% and enhances price competitiveness by integrating ESD protection directly into the internal circuit, ensuring effective ESD discharge without data loss during normal and test operations.

Implementation Method 1

an ESD circuit is provided inside a semiconductor device, including a display driver IC (DDI), in order to protect an internal circuit from ESD. The ESD refers to a phenomenon that accumulated charges move between objects having different potentials at a high speed

Methodology Applied
Scientific EffectElectrostatic Discharge: Electrostatic Discharge

Implementation Method 2

a data transfer unit configured to form a parasitic diode between the input/output pad and a power supply terminal thereof to discharge an introduced electrostatic discharge (ESD)

Methodology Applied
Scientific EffectParasitic Diode Effect: Diode

Data Source

PatentUS8648420B2Semiconductor device
Publication Date: 2014.02.11 MAGNACHIP SEMICON LTD
  • US8648420B2 patent drawing
  • US8648420B2 patent drawing
  • US8648420B2 patent drawing

AI summary

A semiconductor device includes an input/output pad, and a data transfer unit configured to form a parasitic diode between the input/output pad and a power supply terminal thereof to discharge an introduced electrostatic discharge (ESD), and form a data transfer path between the input/output pad and an internal circuit in response to a control signal.