Semiconductor ESD Protection via Protruding Conductive Lines
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional ESD protection circuits in active matrix substrates for liquid crystal display devices may not effectively prevent defective conditions caused by electrostatic discharge (ESD), leading to short-circuiting due to pinholes formed in the dielectric layer during the semiconductor device fabrication process.
Innovation Solution
A semiconductor device design that includes specific configurations of conductive lines and dielectric layers with strategically placed holes and contact holes to control ESD occurrence, ensuring that it primarily occurs in non-critical areas and preventing short-circuiting between conductive elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If contact holes are made in the dielectric layer during fabrication, then electrical connection between layers is achieved, but pinholes may form causing short-circuiting between conductive layers
Solution Approach 1:
The patent applies preliminary action by providing protruding portions on the lower electrically-conductive layer before forming the dielectric layer. These protrusions create intentional discharge paths that will channel ESD away from critical areas during subsequent manufacturing steps, preventing pinholes from causing short-circuits between conductive layers.
Solution Approach 2:
The patent converts the harmful effect of ESD (which could cause pinholes and short-circuits) into a beneficial discharge path. By designing protruding portions that extend into the dielectric layer, the invention creates controlled sites for ESD to occur, transforming random harmful discharges into predictable, harmless discharge paths that protect critical circuit areas.
2Reliability
If ESD protection circuits are added to protect TFTs, then destruction of semiconductor elements is prevented, but the frame region enlarges
Solution Approach 1:
The patent applies universality by making the electrically-conductive layers serve multiple functions: they act as both functional circuit elements (gate lines, source lines) and ESD protection structures (through the protruding portions). This eliminates the need for separate dedicated ESD protection circuits, thereby protecting TFTs without enlarging the frame region.
Solution Approach 2:
The patent merges the ESD protection function with the existing conductive layer structure. The protruding portions of the lower electrically-conductive layer serve dual purposes: maintaining circuit functionality and providing ESD discharge paths. This consolidation integrates protection into the existing design without adding separate protection circuits that would increase frame region area.
3Reliability
If discharging portions with pointed shapes are provided at gate line ends, then ESD discharge is promoted at remote sites, but ESD may still occur at critical TFT locations
Solution Approach 1:
The patent applies local quality by creating spatially varying structures in the electrically-conductive layer. The protruding portions are strategically positioned and sized to create local discharge preferences at specific locations (away from TFTs), while maintaining standard geometry in other areas. This local structural variation guides ESD to occur at predetermined safe locations rather than at critical TFT areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively suppresses production yield decreases by controlling ESD sites, preventing defective conditions even when pinholes are created in the dielectric layer, thus maintaining production quality and efficiency.
Implementation Method 1
a dielectric layer covering the first line, the second line, and the first electrically-conductive portion... the dielectric layer has a first contact hole at least partially overlapping the first end portion and a second contact hole at least partially overlapping the first electrically-conductive portion
Data Source
AI summary
A semiconductor device (100) includes: a first line (8) having a first end portion (8T); a second line (2) being insulated from the first line and having a second end portion (2T); a first electrically-conductive portion (9) provided in the neighborhood of the first and second end portions so as to be spaced apart therefrom; a dielectric layer (20) covering them; and a second electrically-conductive portion (38) on the dielectric layer. The dielectric layer (20) has a first contact hole (CH1) overlapping the first end portion and a second contact hole (CH2) overlapping the first electrically-conductive portion; the second electrically-conductive portion (38) is connected with the first end portion (8T) and the first electrically-conductive portion (9) within the first contact hole (CH1) and the second contact hole (CH2); the second end portion (2T) is insulated from the first electrically-conductive portion (9); the first electrically-conductive portion (9) includes a proximate portion (9T) protruding toward the first end portion; and the dielectric layer (20) has a first hole (H1) overlapping the proximate portion (9T) of the first electrically-conductive portion.