Semiconductor Structure ESD Protection Without PESD Mask
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Solution Overview
Problem
Existing semiconductor structures require a p-type ESD (PESD) mask to meet human body model (HBM) and machine model (MM) standards for electrostatic discharge (ESD) protection, increasing manufacturing costs.
Innovation Solution
A semiconductor structure design that eliminates the need for a PESD mask by incorporating specific doping regions and a gate configuration, allowing for effective ESD protection without additional masking, achieved through a well, lightly doped, and heavily doped regions with defined doping types and depths, ensuring compliance with HBM and MM standards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p-type ESD (PESD) mask is used in middle-voltage NMOS structure, then ESD protection levels (HBM ≥ 2 kV, MM ≥ 200 V) are achieved, but manufacturing cost increases
Solution Approach 1:
The invention extracts and eliminates the PESD mask component from the middle-voltage NMOS structure. By removing this specific masking layer, the manufacturing process is simplified and costs are reduced, while the ESD protection function is maintained through alternative doping region configurations that provide equivalent or superior protection performance.
2Ease of manufacture
If a PESD mask is eliminated to reduce manufacturing cost, then manufacturing cost decreases, but achieving HBM and MM requirements becomes difficult
Solution Approach 1:
The invention applies local quality by creating distinct doping regions with different doping types and concentrations at specific locations within the semiconductor structure. By precisely controlling the doping characteristics in different areas (n-type and p-type regions with specific doping levels), the structure achieves effective ESD protection without requiring the PESD mask, as each region is optimized for its specific functional role.
Solution Approach 2:
The invention changes key parameters including doping type, doping concentration, and region geometry to achieve ESD protection without the PESD mask. By adjusting these parameters in the doping regions and gate structure, the device maintains compliance with HBM and MM standards while eliminating the need for additional masking processes.
Data Source
AI summary
A semiconductor structure comprises a well, a first lightly doped region, a second lightly doped region, a first heavily doped region, a second heavily doped region and a gate. The first lightly doped region is disposed in the well. The second lightly doped region is disposed in the well and separated from the first lightly doped region. The first heavily doped region is disposed in the first lightly doped region. The second heavily doped region is partially disposed in the second lightly doped region. The second heavily doped region has a surface contacting the well. The gate is disposed on the well between the first heavily doped region and the second heavily doped region. The well has a first doping type. The first lightly doped region, the second lightly doped region, the first heavily doped region and the second heavily doped region have a second doping type.