Semiconductor ESD Protection with Transistor-Enhanced SCR
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional silicon-controlled rectifiers (SCRs) for electrostatic discharge (ESD) protection have high trigger voltage, low holding voltage, and slow turn-on speed, limiting their effectiveness in protecting integrated circuits from ESD damage.
Innovation Solution
A semiconductor device incorporating a silicon-controlled rectifier (SCR) structure with a transistor-enhanced current path and an ESD event switch, along with a leakage control section, to reduce trigger voltage, prevent accidental triggering, and minimize leakage current during normal operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional SCR is used for ESD protection, then the current capability is high and layout area is small, but the trigger voltage is high, holding voltage is low, and turn-on speed is slow
Solution Approach 1:
The SCR structure is segmented into multiple functional regions including a first current path with a first bipolar transistor and a second current path with a second bipolar transistor. This segmentation allows different regions to perform specialized functions, with the first current path responsible for normal operation and the second current path activated during ESD events, thereby improving turn-on speed while maintaining protection capability
Solution Approach 2:
The patent implements dynamic switching between different current paths based on operating conditions. A switching circuit dynamically activates the second current path when ESD is detected, enabling the device to transition from a high-impedance state during normal operation to a low-impedance state during ESD events, thus achieving fast response without affecting normal performance
2Reliability
If a conventional SCR is used for ESD protection, then the current capability is high and layout area is small, but the trigger voltage is high
Solution Approach 1:
The patent modifies the electrical parameters of the SCR by introducing a transistor-enhanced current path that provides additional current gain. This changes the trigger characteristics by reducing the voltage required to activate the ESD protection, allowing the device to respond to lower voltage ESD events while maintaining high current capability
3Reliability
If a transistor-enhanced current path is added to reduce trigger voltage and enhance turn-on speed, then ESD protection efficiency is improved, but leakage current and power consumption increase during normal operation
Solution Approach 1:
The switching circuit dynamically controls the transistor-enhanced current path, keeping it disconnected during normal operation to minimize leakage current. When ESD is detected, the switching circuit activates the enhanced current path, providing fast response and low trigger voltage. This dynamic control resolves the contradiction by having the enhanced path active only when needed
Solution Approach 2:
The switching circuit is designed to detect ESD conditions in advance and activate the transistor-enhanced current path before significant leakage current can develop. This preliminary action ensures that the enhanced protection path is ready to operate immediately when ESD occurs, while minimizing energy loss during normal operation
Data Source
AI summary
A semiconductor device includes a rectifier coupled between a circuit ground and a terminal for coupling to an external circuit, a transistor-enhanced current path coupled to the rectifier, and a switching circuit coupled to the transistor-enhanced current path and coupled between the terminal and the circuit ground. The switching circuit is configured to turn off the transistor-enhanced current path during normal operation, and turn on the transistor-enhanced current path when an electrostatic discharge occurs at the terminal.