Semiconductor Etching Structure for Coplanar Patterned Layers
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Solution Overview
Problem
As the semiconductor industry advances to smaller technology nodes, precise control of lithography becomes challenging, leading to uneven etching results and reduced device performance due to uneven top surfaces of patterned layers.
Innovation Solution
A method involving multiple etching steps to form inclined members and planarize layers, ensuring coplanar surfaces and maintaining the desired configuration of patterned layers, thereby preventing irregular etching and improving device yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography and etching processes are used at advanced technology nodes, then device density increases, but uneven top surfaces of patterned layers cause irregular etching and reduced manufacturing precision
Solution Approach 1:
The method performs preliminary planarization by forming a conformal layer over the substrate and patterned layers, then using multiple etching steps with inclined members to prepare a planar surface before final patterning. This preliminary action ensures that subsequent lithography and etching processes occur on a uniform surface, eliminating the unevenness problem that would otherwise compromise manufacturing precision at advanced nodes.
Solution Approach 2:
The etching process is segmented into multiple distinct steps: a first etching step that removes portions of the conformal layer and second layer, and a second etching step that forms inclined members. This segmentation allows each etching step to be optimized independently, with the first step addressing surface uniformity and the second step creating the necessary inclined structures, thereby achieving both planarity and precise patterning.
2Manufacturing precision
If multiple etching steps are performed to achieve planar surfaces, then etching uniformity improves, but process time increases
Solution Approach 1:
The method combines multiple functions into integrated process steps. The conformal layer formation step simultaneously prepares the surface for patterning and provides material for subsequent etching steps. The multiple etching steps are merged with the formation of inclined members that serve both as etching guides and as part of the final device structure, reducing the need for separate processing steps and minimizing overall process time while maintaining surface planarity.
3Reliability
If conformal layers and multiple patterned layers are formed to achieve coplanar surfaces, then device performance improves, but material usage increases
Solution Approach 1:
The method employs sacrificial materials that are intentionally deposited and then selectively removed during the etching process. The conformal layer and second layer are deposited to achieve the necessary coplanar surfaces and structural integrity, then portions are selectively removed through the multi-step etching process to reveal the final patterned structure. This approach allows the use of materials temporarily to achieve the desired geometry, with excess material being discarded in a controlled manner that ensures device performance while minimizing waste.
Data Source
AI summary
The present disclosure provides a manufacturing method of a semiconductor structure. The method includes: forming a conformal layer over a first patterned layer over a substrate; forming a second layer over the conformal layer and between portions of the first patterned layer; performing a first etching to form a second patterned layer and a patterned conformal layer; performing a second etching to remove a portion of the first patterned layer to form a first inclined member of the first patterned layer tapered away from the substrate and lining a vertical portion of the patterned conformal layer, and to remove a portion of the second patterned layer to form a second inclined member of the second patterned layer tapered away from the substrate and lining the vertical portion of the patterned conformal layer; and performing a third etching to remove the vertical portions of the patterned conformal layer.