Semiconductor Etching with Inhibitor-Protected Spacer Layers
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Solution Overview
Problem
In semiconductor manufacturing, the reduction of minimum feature sizes leads to increased challenges in etching processes, particularly due to the aspect ratio of openings formed during the patterning of layers, which can result in voids and defects during subsequent deposition processes, and the use of hydrofluoric acid as an etchant poses risks to spacer materials like titanium oxide.
Innovation Solution
The introduction of an inhibitor, such as an N-ethanolamide derivative ligand, in the etching solution reduces the etch rate of the spacer material, minimizing its removal during the etching of the middle layer, thereby reducing the aspect ratio of openings and preventing damage to the spacer material, followed by the deposition of a dielectric material using atomic layer deposition to fill these openings without voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but the aspect ratio of openings increases leading to voids and defects during deposition
Solution Approach 1:
The patent applies segmentation by dividing the etching process into multiple stages with different etchants. First, a high-aspect-ratio opening is formed through the first dielectric layer using a first etchant. Then, the middle layer is removed using a second etchant that selectively removes this layer while protecting the spacer material. This segmented approach allows the opening to be formed with high aspect ratio without creating voids, as each etching step is optimized for its specific purpose.
Solution Approach 2:
The patent introduces a middle layer as an intermediary element between the first dielectric layer and the second dielectric layer. This middle layer serves as a sacrificial layer that facilitates the formation of high-aspect-ratio openings. The middle layer is selectively removed after the opening is formed, allowing the spacer material to define the final pattern without being damaged by the etching process. This intermediary layer enables the deposition process to proceed without voids while maintaining the high integration density.
2Ease of manufacture
If hydrofluoric acid is used as an etchant to remove the middle layer, then the middle layer can be effectively removed, but the spacer material like titanium oxide is excessively damaged
Solution Approach 1:
The middle layer acts as an intermediary sacrificial layer that is selectively removed using hydrofluoric acid. This middle layer is designed to be highly susceptible to HF etching while the spacer material is protected by the selective nature of the etching process. The middle layer absorbs the harmful effect of the aggressive etchant, allowing effective removal of the middle layer while minimizing damage to the spacer material through proper process sequencing and selective etching.
Solution Approach 2:
The patent applies parameter changes by carefully controlling the composition and concentration of the etching solution, as well as the thickness and material properties of the middle layer. By adjusting these parameters, the etching process is optimized to remove the middle layer efficiently while the spacer material remains substantially intact. The selective etching is achieved by matching the etchant parameters to the specific properties of the middle layer material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the aspect ratio of openings, minimizes defects, and prevents excessive damage to spacer materials, enhancing the quality and yield of semiconductor devices by ensuring accurate deposition and reducing cut fail defects.
Implementation Method 1
applying an etchant to remove the middle layer
Implementation Method 2
the etchant comprises an inhibitor which inhibits an etch rate of the spacer material
Implementation Method 3
the deposition of a dielectric material using atomic layer deposition to fill these openings without voids
Data Source
AI summary
A semiconductor device and method of manufacture are provided. After a patterning of a middle layer, the middle layer is removed. In order to reduce or prevent damage to other underlying layers exposed by the patterning of the middle layer and intervening layers, an inhibitor is included within an etching process in order to inhibit the amount of material removed from the underlying layers.