Semiconductor Device Exposed Die Pad Thermal Stress Management
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Solution Overview
Problem
The reliability of resin-sealed type semiconductor devices with an exposed die pad is compromised due to interfacial peeling between the semiconductor chip and the die pad, leading to cracks and reduced reliability, especially under high-temperature and low-temperature thermal stress.
Innovation Solution
The semiconductor device is structured with a thicker semiconductor chip and a thinner sealing resin, ensuring that the sum of the die pad and sealing resin thickness is not more than the chip thickness, balancing thermal expansion coefficients and reducing warping and peeling stresses, while using copper materials for the chip mounting portion and leads to enhance heat radiation and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the die pad is exposed from the sealing body to improve heat radiation, then heat dissipation performance is improved, but interfacial peeling occurs between the semiconductor chip and die pad leading to cracks and reduced reliability
Solution Approach 1:
The patent changes the thickness parameters of the semiconductor chip, die pad, and sealing resin to satisfy a specific relational expression (chip thickness ≥ die pad thickness + sealing resin thickness). This parameter optimization resolves the contradiction by creating a structural configuration that reduces thermal stress and prevents interfacial peeling while maintaining heat radiation performance through the exposed die pad structure.
Solution Approach 2:
The patent employs a composite structure consisting of the semiconductor chip, die pad, sealing resin, and lead frame with copper materials. This composite material approach allows optimization of thermal and mechanical properties by selecting materials with appropriate thermal expansion coefficients and mechanical strengths, thereby preventing peeling while maintaining effective heat dissipation.
2Temperature
If the die pad is exposed from the sealing body for heat radiation, then thermal management is improved, but warping and peeling stresses increase under thermal stress
Solution Approach 1:
The patent optimizes thickness parameters of various components (semiconductor chip, die pad, sealing resin) to satisfy a specific relational expression that balances thermal expansion and contraction. This parameter control prevents excessive warping and peeling stresses under thermal cycling conditions while maintaining the exposed die pad structure for effective heat radiation.
Solution Approach 2:
The patent addresses thermal expansion differences between materials by designing a structure where the semiconductor chip, die pad, and sealing resin have coordinated thickness ratios. This design compensates for differential thermal expansion under high-temperature and low-temperature conditions, preventing structural instability and interfacial peeling while maintaining thermal management performance.
3Reliability
If the semiconductor chip thickness is increased to prevent peeling, then reliability is improved, but device size increases
Solution Approach 1:
The patent determines optimal thickness parameters for the semiconductor chip, die pad, and sealing resin that satisfy a specific relational expression. This parameter optimization achieves the minimum required chip thickness to prevent interfacial peeling and ensure bonding reliability, while avoiding unnecessary increases in device size. The solution represents the optimal balance point between reliability requirements and size constraints.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces warping and peeling, enhancing the reliability of the semiconductor device by balancing thermal stresses and preventing cracking, thereby improving the device's performance under severe temperature conditions.
Implementation Method 1
the chip mounting portion and the wire are comprised of copper... enhance heat radiation
Data Source
AI summary
A semiconductor device includes a die pad, a semiconductor chip with a bonding pad being formed, a lead one end of which is located in the vicinity of the semiconductor chip, a coupling wire that connects an electrode and the lead, and a sealing body that seals the semiconductor chip, the coupling wire, a part of the lead, and a part of the die pad. A lower surface of the die pad is exposed from a lower surface of the sealing body, the die pad and the coupling wire are comprised of copper, and a thickness of the semiconductor chip is larger than the sum of a thickness of the die pad and a thickness from an upper surface of the semiconductor chip to an upper surface of the sealing body.