Semiconductor Device with Exposed Lead Frames for Thermal Management

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Solution Overview

Problem

Loading a diode and a MOSFET or IGBT in a single package does not adequately address heat dissipation issues, leading to potential thermal destruction of semiconductor devices in power circuits.

Innovation Solution

A semiconductor device design featuring a first and second lead frame with semiconductor chips, where the chips' electrodes are connected by bonding wires and the lead frames' surfaces are exposed from a sealing resin to enhance heat dissipation, reducing wiring inductance and improving thermal management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a diode and a MOSFET or IGBT are loaded in a single package, then the mounting space is reduced, but the heat dissipation becomes inadequate

Engineering Contradiction:
Improvemounting spaceVSAvoidheat dissipation
Core Design Contradiction:
Area of stationary objectVSTemperature

Solution Approach 1:

The single package is segmented into multiple independent lead frames (first lead frame, second lead frame, third lead frame) that are electrically isolated from each other. Each lead frame can independently dissipate heat through its exposed rear surface, effectively dividing the thermal management function while maintaining compact packaging.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes the third dimension (vertical direction) by exposing the rear surfaces of multiple lead frames from the sealing resin. This allows heat dissipation to occur in multiple directions simultaneously (through the sealing resin and through exposed rear surfaces), transforming a two-dimensional heat dissipation problem into a three-dimensional thermal management solution.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Temperature

If a diode and a MOSFET or IGBT are discretely packaged, then the heat dissipation is improved, but the mounting space increases

Engineering Contradiction:
Improveheat dissipationVSAvoidmounting space
Core Design Contradiction:
TemperatureVSArea of stationary object

Solution Approach 1:

Multiple lead frames that would traditionally be separate discrete packages are merged into a single integrated package structure. The first, second, and third lead frames are housed together within one sealing resin, maintaining their electrical isolation while sharing a common package body, thus reducing overall mounting space.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single package structure serves multiple functions simultaneously: it provides electrical isolation between different circuits, enables independent heat dissipation paths for multiple components, and reduces mounting space. Each lead frame within the package can be used for different functional purposes while sharing the same package infrastructure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Temperature

If cooling fins are attached to each discrete package, then the heat dissipation is improved, but the device complexity increases

Engineering Contradiction:
Improveheat dissipationVSAvoidstructure complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The cooling fin function is extracted from being a separate attached component and is instead integrated directly into the lead frame structure itself. The rear surfaces of the lead frames serve as heat dissipation surfaces, eliminating the need for additional cooling fin attachments and reducing overall device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

4Reliability

If wiring patterns are formed on substrate to connect terminals, then the electrical connection is established, but the wiring inductance increases causing spike voltage

Engineering Contradiction:
Improveelectrical connectionVSAvoidspike voltage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

Bonding wires serve as intermediaries to connect electrodes between different lead frames and semiconductor chips. This wiring method reduces inductance compared to traditional substrate wiring patterns, thereby minimizing spike voltage generation during switching operations while maintaining reliable electrical connections.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces spike voltage generation due to wiring inductance and enhances heat dissipation, addressing the thermal challenges faced by single-package semiconductor devices in power circuits.

Implementation Method 1

a first electrode disposed on a front surface of the first semiconductor chip is electrically connected to the principal surface of the second lead frame by a bonding wire

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

the other one of the principal surfaces of the first lead frame and the other one of the principal surfaces of the second lead frame are disposed so as to be exposed from a sealing resin

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9754863B2Semiconductor device
Publication Date: 2017.09.05 FUJI ELECTRIC CO LTD
  • US9754863B2 patent drawing
  • US9754863B2 patent drawing
  • US9754863B2 patent drawing

AI summary

The semiconductor device improves heat dissipation by loading a diode and a MOSFET or IGBT in a single package. A drain electrode disposed on a rear surface of a MOSFET chip is soldered to an upper surface of a first lead frame, and a cathode electrode disposed on a rear surface of a diode chip is soldered to an upper surface of a second lead frame. Rear surfaces of the first lead frame and second lead frame to which neither the diode chip nor the MOSFET chip is connected are disposed so as to be exposed from a sealing resin.