Semiconductor Failure Analysis Across Multiple Inspection Stages
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Solution Overview
Problem
Existing failure analysis systems for semiconductor devices lack the capability for integrative analysis across multiple inspection processes, leading to inefficiencies in analyzing normal/failure information in block and column units.
Innovation Solution
A failure analysis system that includes a memory for storing normal/failure information, a failure information management table that adds product, fabricating, process, and test information, and an analyzing unit that integrates analysis across multiple inspection processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If separate analysis is performed for each inspection process, then analysis simplicity is maintained, but analysis efficiency and comprehensiveness deteriorate
Solution Approach 1:
The patent merges multiple inspection process analyses into a single integrated failure analysis system. The system collects normal/failure information from multiple inspection processes (pre-process, post-process, and final inspection) and performs unified analysis, thereby improving analysis efficiency and comprehensiveness without significantly increasing system complexity.
Solution Approach 2:
The failure analysis system is designed with multi-functionality to handle various inspection processes uniformly. It can analyze normal/failure information from different inspection stages (pre-process, post-process, final inspection) using the same analytical framework, making the system versatile and efficient across multiple inspection contexts.
2Measurement precision
If detailed normal/failure information is collected from multiple inspection processes, then analysis accuracy is improved, but data processing complexity increases
Solution Approach 1:
The patent segments the collected normal/failure information into structured categories corresponding to different inspection processes (pre-process, post-process, final inspection). This segmentation allows the system to maintain high analysis accuracy by preserving detailed information while managing data processing complexity through organized, modular data structures.
Data Source
AI summary
According to one embodiment, the failure analysis system of the semiconductor device includes a memory, a failure information management table, and an analyzing unit. The memory stores normal/failure information collected in a block unit and a column unit in a chip, in a plurality of inspection processes of the semiconductor memory. The failure information management table stores the normal/failure information in the block unit and the column unit stored in the memory, with an addition of product information, fabricating information including a lot number, a wafer number, and a chip address, process information, and test information, which are common information ranging over the inspection processes. The analyzing unit analyzes the normal/failure information in the block unit and the column unit ranging over the plurality of inspection processes, on the basis of the information stored in the failure information management table.