Semiconductor Fault Isolation Using PFIB Grounding Cavities

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Solution Overview

Problem

Existing fault isolation methods for semiconductor devices are inefficient and time-consuming, particularly in identifying and isolating manufacturing defects in metallization layers, due to limitations in resolution and the need for wafer singulation and probe tip landing, which hinder precise fault localization.

Innovation Solution

The use of plasma-focused ion beam (PFIB) milling to create cavities and grounding regions in semiconductor devices, combined with voltage contrast imaging, allows for precise fault isolation without the need for wafer singulation, enabling rapid identification of defects with sub-100 nm spatial resolution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional fault isolation methods are used, then fault identification can be performed, but the process is time-consuming and requires wafer singulation and probe tip landing which reduces productivity

Engineering Contradiction:
Improvefault localization precisionVSAvoiddefect analysis speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent extracts the problematic metallization layer material through FIB milling to create cavities and expose fault locations. By removing unnecessary material and creating direct visual access to the fault site, the method eliminates the need for time-consuming wafer singulation and probe tip landing while maintaining precise fault localization capability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical probe tip landing system with a direct imaging system. Instead of using physical probes to locate and identify faults, the method uses FIB milling combined with secondary ion mass spectrometry (SIMS) imaging to visually identify fault locations, thereby eliminating the mechanical probing step and significantly reducing analysis time

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If traditional fault isolation methods are used, then faults can be identified, but the resolution is limited and requires multiple processing steps

Engineering Contradiction:
Improvespatial resolutionVSAvoidprocessing steps
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines FIB milling and SIMS imaging into a single integrated process. The FIB mill creates cavities and exposes fault locations while the SIMS system simultaneously images the exposed areas to identify faults based on material composition. This merging of material removal and imaging functions into one process achieves sub-100 nm spatial resolution while reducing the number of processing steps

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the detection parameter from electrical signal response (traditional method) to material composition analysis via SIMS imaging. By analyzing the secondary ion signals that reveal the chemical composition of materials at the fault site, the method achieves higher spatial resolution and can identify faults based on material differences rather than electrical characteristics

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables rapid and precise fault isolation in semiconductor devices, reducing the time and effort required for defect analysis, thereby improving yield and efficiency in semiconductor manufacturing processes.

Implementation Method 1

The use of plasma-focused ion beam (PFIB) milling to create cavities and grounding regions in semiconductor devices

Methodology Applied
Scientific EffectIon beam milling: Ion Beam

Implementation Method 2

The use of plasma-focused ion beam (PFIB) milling to create cavities and grounding regions in semiconductor devices

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 3

combined with voltage contrast imaging, allows for precise fault isolation

Methodology Applied
Scientific EffectVoltage contrast: Electric Field

Data Source

PatentUS20250208061A1Fault isolation for semiconductor device manufacturing
Publication Date: 2025.06.26 INTEL CORP
  • US20250208061A1 patent drawing
  • US20250208061A1 patent drawing
  • US20250208061A1 patent drawing

AI summary

Devices and methods that are useful for fault isolation in microelectronic devices are provided. A portion of a microelectronic device to be analyzed is grounded through the creation of a cavity in the device surface. Voltage contrast provides the ability to identify individual failure sites on the microelectronic device. The grounding of the portion of the device can be reversed and a different portion of the microelectronic device grounded for additional voltage contrast analysis and fault identification. These processes can be repeated a number of times to probe multiple chained structures.