Semiconductor Structure Isolating FET Active Bodies
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor technology, mixed-voltage I/O interfaces with cascode configurations experience reliability issues due to the turn-on phenomenon of parasitic bipolar junction transistors when subjected to voltages higher than the junction breakdown voltage, leading to malfunction.
Innovation Solution
A semiconductor structure comprising a first and second field-effect transistor (FET) with a common electrode, isolated by an isolation structure, and a body electrode of the same conductivity type, preventing parasitic BJT junction breakdown and enhancing voltage tolerance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stress or pressure
If cascode configuration is used for mixed-voltage I/O interface, then voltage handling capability is improved, but reliability deteriorates due to parasitic BJT turn-on at high voltages
Solution Approach 1:
The patent divides the common body region into two separate active bodies (first active body and second active body) using an isolation structure. This segmentation prevents the parasitic BJT turn-on phenomenon by isolating the body regions, allowing each FET to handle higher voltages independently without triggering the parasitic bipolar junction transistor effect that would occur in a shared body configuration.
2Reliability
If isolation structure is introduced to separate active bodies, then parasitic BJT prevention is improved, but device complexity increases
Solution Approach 1:
The patent combines multiple functions into the isolation structure: it serves as both an electrical isolation barrier between the first and second active bodies to prevent parasitic BJT turn-on, and as a structural element that maintains the cascode configuration. By merging these functions, the patent achieves reliable parasitic BJT prevention without proportionally increasing device complexity.
Data Source
AI summary
A semiconductor structure and an integrated circuit are provided. The semiconductor structure includes a first field-effect transistor (FET), a second FET, an isolation structure, and a body electrode. The first FET includes a first active body having a first type conductivity. The second FET includes a second active body having the first type conductivity. The first active body and the second active body are isolated from each other by the isolation structure. The body electrode has the first type conductivity and formed in the second active body.


