Semiconductor Field Plate Tunable Short-Circuit Path
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Solution Overview
Problem
Conventional high-voltage semiconductor structures face challenges in minimizing turn-on resistance and chip area, leading to increased size and higher resistance due to the need to avoid punch-through effects between the source and drain.
Innovation Solution
A semiconductor structure comprising a substrate, wells, doped regions, a gate electrode, an insulating layer, a field plate, and a tunable circuit that provides short-circuit paths between the field plate and the gate electrode or doped regions, allowing for adjustable turn-on resistance and gate charge values by controlling voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the channel length is increased to avoid punch-through effect, then the reliability is improved, but the device size and turn-on resistance increase
Solution Approach 1:
A field plate structure is introduced as an intermediary element between the gate electrode and the drain region. The field plate extends the gate control region without increasing the physical channel length, thereby preventing punch-through effects while maintaining compact device dimensions and low turn-on resistance.
Solution Approach 2:
The field plate extends the gate control in a spatial dimension beyond the conventional gate length, creating an extended control region that prevents punch-through without increasing the channel length. This dimensional extension allows reliable high-voltage operation in a compact footprint.
2Reliability
If the channel length is increased to avoid punch-through effect, then the reliability is improved, but the turn-on resistance increases
Solution Approach 1:
The field plate acts as an intermediary that extends the electric field control region, preventing punch-through by creating a gradual field distribution. This allows the use of shorter channel lengths that maintain low turn-on resistance while still preventing punch-through through the extended field control.
Solution Approach 2:
The field plate modifies the electric field distribution parameters in the drain region, creating a more gradual field profile that prevents abrupt breakdown. This parameter change allows shorter channel lengths to achieve both low resistance and punch-through prevention.
3Productivity
If the chip area is reduced, then the productivity is improved, but the turn-on resistance increases
Solution Approach 1:
By extending the gate control into an additional spatial dimension through the field plate, the invention achieves effective field control with shorter channel lengths. This allows compact device layout with reduced chip area while maintaining low turn-on resistance through the extended control region.
Solution Approach 2:
The field plate creates a dynamic electric field distribution that can be controlled through voltage application, allowing the device to achieve low resistance states when needed while maintaining compact dimensions. The flexible field control enables optimization of both area and resistance characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces turn-on resistance and gate charge values, optimizing the figure of merit and power consumption while maintaining efficient high-voltage operations.
Implementation Method 1
the field plate overlaps the insulating layer and the gate electrode
Implementation Method 2
The tunable circuit provides a first short-circuit path between the field plate and the gate electrode, or it provides a second short-circuit path between the field plate and the first doped region
Data Source
AI summary
A semiconductor structure including a substrate, a first well, a second well, a first doped region, a second doped region, a gate electrode, an insulating layer, a field plate, and a tunable circuit is provided. The first and second wells are formed on the substrate. The first doped region is formed in the first well. The second doped region is formed in the second well. The gate electrode is disposed over the substrate. The gate electrode, the first doped region, and the second doped region constitute a transistor. The insulating layer is disposed on the substrate and overlaps the gate electrode. The field plate overlaps the insulating layer and the gate electrode. The tunable circuit provides either a first short-circuit path between the field plate and the gate electrode, or a second short-circuit path between the field plate and the first doped region.