Semiconductor Voltage Blocking Area Field Relaxation

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Solution Overview

Problem

Existing semiconductor devices face challenges in sufficiently relaxing electric field crowding in voltage blocking areas, leading to reduced breakdown voltage.

Innovation Solution

A semiconductor device design featuring a voltage blocking area with a field relaxation region of decreasing depth and spatial-modulation portions, which effectively relaxes electric field crowding by using a concentric ring-shaped doping pattern to reduce impurity concentration towards the outside, enhancing breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a reduced surface field (RESURF) layer implemented by a plurality of p-type ion-implanted layers are provided in a voltage blocking area, then electric field crowding is relaxed, but the breakdown voltage is lowered

Engineering Contradiction:
Improveelectric field crowdingVSAvoidbreakdown voltage
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent applies local quality by creating a field relaxation region with spatially varying impurity concentration. The impurity concentration is highest near the active area and decreases toward the outer end of the voltage blocking area, with the deepest penetration near the active area and shallower penetration at the outer end. This gradient structure provides different levels of field relaxation at different locations, effectively relaxing electric field crowding while maintaining high breakdown voltage.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameters of impurity concentration and implantation depth across the voltage blocking area. By varying these parameters spatially - with higher concentration and deeper penetration near the active area, and lower concentration and shallower penetration at the outer end - the patent achieves effective electric field relaxation without compromising breakdown voltage.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If a p+-type layer, a p−-type layer, and a p−−-type layer are provided toward the outside in a voltage blocking area, then electric field distribution is modified, but the breakdown voltage is lowered

Engineering Contradiction:
Improveelectric field crowdingVSAvoidbreakdown voltage
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent implements local quality by creating a field relaxation region where impurity concentration and penetration depth vary spatially. The region has maximum impurity concentration and penetration depth near the active area, with both parameters decreasing toward the outer end of the voltage blocking area. This localized variation in material properties effectively relaxes electric field crowding while preserving high breakdown voltage.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies parameter changes by systematically varying impurity concentration and implantation depth across the voltage blocking area. The concentration gradient and depth gradient work together to modify the electric field distribution, achieving effective field relaxation without reducing breakdown voltage.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design efficiently prevents electric field crowding and improves breakdown voltage, expanding the margin of active and edge breakdown voltages.

Implementation Method 1

relaxing electric field crowding in a voltage blocking area

Methodology Applied
Scientific EffectElectric field: Electric Field

Implementation Method 2

p-type ion-implanted layers

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS10777678B2Semiconductor device
Publication Date: 2020.09.15 FUJI ELECTRIC CO LTD
  • US10777678B2 patent drawing
  • US10777678B2 patent drawing
  • US10777678B2 patent drawing

AI summary

A semiconductor device includes: an active area including a drift layer of a first conductivity type; and a voltage blocking area arranged around the active area and including an field relaxation region having a second conductivity type, being provided in an upper portion of the drift layer, wherein a depth of the field relaxation region decreases toward outside, and a spatial-modulation portion is provided at an outer end of the field relaxation region.