Semiconductor Field Stop Layer Carrier Profile Optimization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional semiconductor devices with n-type field stop layers face challenges in maintaining low on-voltage deviation and high switching speed due to the carrier concentration ratio at the interface between the field stop layer and the collector layer, especially when the thickness of the semiconductor wafer is reduced.

Innovation Solution

A method involving hydrogen ion implantation and subsequent heat treatment to form a broad carrier concentration profile in the n-type field stop layer, followed by laser annealing to reduce the carrier concentration at the interface and adjust the slope of the carrier concentration distribution, ensuring a higher peak concentration ratio and reduced on-voltage deviation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the thickness of the semiconductor wafer is reduced to lower the on-voltage, then the on-voltage is reduced, but the breakdown voltage cannot be maintained

Engineering Contradiction:
Improveon-voltageVSAvoidbreakdown voltage
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent introduces a field stop layer with specific carrier concentration distribution (higher concentration peak than drift layer, decreasing toward collector side) at a specific location in the semiconductor structure. This localized modification with non-uniform carrier concentration profile enables the thin drift layer to maintain breakdown voltage while keeping on-voltage low, resolving the contradiction between reduced thickness and voltage maintenance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the carrier concentration parameter by forming a field stop layer with a specific concentration profile through proton irradiation and heat treatment. The carrier concentration decreases from the drift layer interface toward the collector side, creating an optimized parameter distribution that simultaneously achieves low on-voltage and maintained breakdown voltage in thinned devices.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If proton irradiation is used to form a field stop layer with broad carrier concentration profile, then the field stop layer is formed, but the carrier concentration at the interface with collector layer becomes too high

Engineering Contradiction:
Improvecarrier concentration profile breadthVSAvoidcarrier concentration ratio at interface
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent performs preliminary proton irradiation to create a broad carrier concentration profile in the field stop layer, then subsequently applies heat treatment to selectively reduce the carrier concentration at the collector layer interface. This preliminary action followed by refinement allows achieving both broad profile and precise interface concentration control.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs a continuous process combining proton irradiation to create the broad carrier concentration profile followed by heat treatment to optimize the interface region. This continuous sequence of useful actions transforms the initially broad but imprecise profile into one that simultaneously achieves breadth and precise interface concentration control.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces on-voltage deviation and enhances switching speed by optimizing the carrier concentration profile, allowing for efficient operation of IGBTs with reduced device thickness.

Implementation Method 1

a first implantation process of implanting hydrogen atoms from a second principal surface side of a semiconductor substrate

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

a first heat treatment process of promoting generation of donors from the hydrogen atoms by a first heat treatment

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Implementation Method 3

a second heat treatment process of locally heating the semiconductor substrate by a second heat treatment so as to activate the third semiconductor layer

Methodology Applied
Scientific EffectLaser annealing: Laser

Data Source

PatentUS10431650B2Method of manufacturing semiconductor device
Publication Date: 2019.10.01 FUJI ELECTRIC CO LTD
  • US10431650B2 patent drawing
  • US10431650B2 patent drawing
  • US10431650B2 patent drawing

AI summary

A method of manufacturing a semiconductor device, including implanting hydrogen atoms from a second principal surface of a semiconductor substrate, forming a plurality of second semiconductor layers that each have a carrier concentration higher than that of the first semiconductor layer and that have carrier concentration peak values at different depths from the second principal surface of the semiconductor substrate, applying a heat treatment process to promote generation of donors from the hydrogen atoms, implanting an impurity from the second principal surface of the semiconductor substrate, forming a third semiconductor layer in the semiconductor substrate at the second principal surface thereof, and applying another heat treatment process to locally heat the semiconductor substrate, so as to reduce the carrier concentration at an interface between the third semiconductor layer and the second semiconductor layer adjacent to the third semiconductor layer.