Semiconductor Filter Membrane With Uniform Nanopores for Particle Removal
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Solution Overview
Problem
Existing point-of-use filters in semiconductor manufacturing have random pore sizes and shapes, leading to ineffective particle removal and potential contamination of silicon wafers, which can alter their semiconductive nature and reduce yield.
Innovation Solution
Development of a filter membrane with uniformly sized and shaped pores, ranging from 5 nm to 50 nm, fabricated using nano-imprint lithography, laser patterning, photo lithography, or etching processes, ensuring precise control over pore size and distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional filters with random pore structures are used, then the device complexity is low and ease of manufacture is high, but particle removal effectiveness is poor and contamination risk increases
Solution Approach 1:
The patent applies preliminary action by first forming a sacrificial layer with a predetermined pattern before depositing the filter membrane material. This pre-established template guides the formation of uniformly spaced pores, ensuring manufacturing precision while simplifying the overall process through staged fabrication
Solution Approach 2:
The sacrificial layer serves as an intermediary element that temporarily exists to define the pore structure. It mediates between the fabrication process and the final filter membrane, enabling precise pore formation through deposition and subsequent removal of this intermediate layer
2Productivity
If filters with larger pores are used, then fluid flow rate increases and productivity improves, but particle capture efficiency decreases and contamination risk increases
Solution Approach 1:
The patent systematically varies pore size parameters within the 5-50 nm range to optimize the balance between flow rate and particle capture. By controlling pore diameter, porosity, and membrane thickness as independent parameters, the filter achieves both high productivity and reliability for different semiconductor manufacturing needs
3Reliability
If uniform pore structures are fabricated using advanced lithography, then particle removal effectiveness improves, but manufacturing cost and device complexity increase
Solution Approach 1:
The fabrication process is segmented into distinct sequential steps: sacrificial layer formation, membrane material deposition, and sacrificial layer removal. This segmentation allows each step to be optimized independently using standard semiconductor fabrication tools, reducing overall device complexity while maintaining high reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances particle capturing efficiency, maintains semiconductor wafer integrity by effectively removing contaminants, and improves yield by preventing defects in integrated circuits.
Implementation Method 1
Filters, in particular, point-of-use (POU) filters, are designed to remove contaminants or particles from the liquids, solutions, and/or solvents used in semiconductor integrated circuit manufacturing processes
Data Source
AI summary
A filter device includes one or more filter membranes, and a filter housing enclosing the one or more filter membranes. Each of the filter membranes includes a base membrane and a plurality of through holes.