Semiconductor Fin Devices with Defect-Trap Buffer Layers
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Solution Overview
Problem
The scaling-down of MOS transistors in semiconductor devices compromises operational characteristics, necessitating techniques to enhance charge carrier mobility and integrate high-performance semiconductor devices with reduced size and design rules.
Innovation Solution
A semiconductor device design featuring a trench structure with a crystalline channel-forming structure having a lower portion with higher crystal defect density and epitaxial fins that are narrower and free of defects, using selective epitaxial growth processes to form buffer and channel patterns with different energy band gaps, and integrating a gate electrode and source/drain regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOS transistors are scaled down to increase integration density, then device integration increases, but charge carrier mobility deteriorates
Solution Approach 1:
The channel region is segmented into multiple fins extending vertically from the substrate, creating multiple parallel conduction paths. This segmentation allows the transistor to maintain higher effective channel width and charge carrier mobility while occupying less lateral area, thus increasing integration density without compromising mobility
Solution Approach 2:
The channel structure transitions from a planar two-dimensional configuration to a three-dimensional vertical fin structure. By extending the channel vertically in the third dimension, the device achieves higher integration density in the lateral plane while maintaining adequate channel dimensions for acceptable charge carrier mobility through the vertical path
2Productivity
If the trench width is reduced to increase fin density, then integration density increases, but manufacturing precision requirements worsen
Solution Approach 1:
A buffer layer is formed in the trench before forming the fin structure. This preliminary buffer layer serves as a foundation that relaxes the direct requirement for ultra-precise trench width control, as the buffer layer can compensate for variations and provide a stable base for subsequent fin formation, thereby enabling higher fin density without proportionally increasing manufacturing difficulty
Solution Approach 2:
The buffer layer acts as an intermediary between the trench structure and the fin structure. It mediates the relationship between trench dimensions and fin characteristics, allowing the fin density to be increased while the buffer layer absorbs some of the manufacturing variability, thus reducing the direct impact of trench width control precision requirements
3Reliability
If epitaxial growth is used to form defect-free fins, then charge carrier mobility improves, but manufacturing complexity increases
Solution Approach 1:
The epitaxial growth process is segmented into multiple stages: first forming a buffer layer with relaxed requirements, then forming the fin structure on top. This segmentation allows the critical fin region to be grown under optimized conditions for defect-free crystalline structure and high charge carrier mobility, while the buffer layer handles the manufacturing variability, thus improving mobility without proportionally increasing overall process complexity
Solution Approach 2:
Different regions of the channel-forming structure are grown with different qualities: the buffer layer is grown with relaxed requirements to handle manufacturing variability, while the fin region is grown with high precision to ensure defect-free structure and high charge carrier mobility. This local differentiation of quality requirements allows the system to achieve high mobility in the critical fin region without requiring the entire structure to meet ultra-high standards, thus managing manufacturing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of high-density fin field effect transistors with improved performance by trapping crystal defects in the lower portion of the trench, allowing the epitaxial fins to be defect-free and enhancing the mobility of charge carriers, thus addressing the challenges of scaling down MOS transistors.
Implementation Method 1
a lower portion of the channel forming structure has a higher crystal defect density than the fins of the channel forming structure
Data Source
AI summary
A semiconductor device includes a substrate, an insulating layer disposed on the substrate and having a trench exposing a surface portion of the substrate, and a channel-forming structure comprising crystalline semiconductor material. The channel-forming structure has a lower portion located in the trench and fins extending upright on the lower portion, where the fins are spaced from each other and are each narrower than an opening of the trench, and the lower portion of the channel forming structure has a higher crystal defect density than the fins of the channel forming structure.