Semiconductor Fin Density Design Rules for Isolated Fin Peeling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor integrated circuit manufacturing, it is challenging to simultaneously produce isolated and tightly packed semiconductor fins with similar profiles and critical dimensions, as isolated fins tend to peel and detach from the substrate, leading to device functionality issues and contamination.
Innovation Solution
The approach involves dividing the semiconductor integrated circuit into core and cell portions, applying design rules requiring minimum packing density to the core portion but not to the cell portion, allowing for the formation of isolated fins in densely packed cells, thereby preventing peeling and ensuring consistent fin profiles and dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If isolated semiconductor fins are formed using the same patterning process as tightly packed fins, then both types of fins can be produced simultaneously, but the isolated fins exhibit degraded profiles and reduced critical dimensions
Solution Approach 1:
The patent applies different design rules to different regions of the semiconductor device. Core device sections require fins to be arranged in groups of at least three adjacent fins with minimum pitch spacing, while isolated fins in other sections are permitted. This local differentiation allows isolated fins to be formed without the same profile degradation issues that occur when they are formed using identical patterning conditions as tightly packed fins.
2Reliability
If isolated semiconductor fins are formed using standard patterning processes, then device functionality can be achieved, but the fins tend to peel and detach from the substrate
Solution Approach 1:
The patent implements region-specific design rules where core device sections require fins to be arranged in groups of at least three adjacent fins. This local arrangement provides mutual support and prevents peeling. Isolated fins are permitted in other sections where they can be formed with adequate spacing. This spatial differentiation resolves the peeling issue by ensuring that isolated fins are only formed in regions where the design rules permit sufficient spacing and support structures.
3Quantity of substance
If semiconductor fins are tightly packed to increase integration levels, then device density improves, but profile control and critical dimension uniformity become more difficult
Solution Approach 1:
The patent segments the semiconductor device into distinct functional regions: core device sections where fins must be arranged in groups of at least three adjacent fins with controlled pitch spacing, and other sections where isolated fins are permitted. This segmentation allows tightly packed fins to be implemented in core sections for high integration, while isolated fins in other sections avoid the profile control issues associated with dense packing.
4Manufacturing precision
If design rules require minimum pitch spacing between fins, then profile control improves, but device feature density decreases
Solution Approach 1:
The patent applies minimum pitch spacing design rules selectively to core device sections where fins are arranged in groups of at least three adjacent fins. In other sections, isolated fins are permitted without the same pitch spacing constraints. This local application of design rules maintains profile control in critical core sections while allowing higher feature density in non-core sections, thereby resolving the contradiction between precision and density.
Data Source
AI summary
A method for designing a semiconductor ic chip includes dividing the chip into functional blocks such as a core portion and one or more other functional cells and applying design rules concerning the spatial arrangement of semiconductor fins to the core portion but not to the other functional cells. The design guidelines include the application of design rules to some but not all functional blocks of the chip, may be stored on a computer-readable medium and the design of the semiconductor ic chip and the generation of a photomask set for manufacturing the semiconductor ic chip may be carried out using a CAD or other automated design system. The semiconductor ic chip formed in accordance with this method includes semiconductor fins that are formed in both the core portion and the other functional cells but are only required to be tightly packed in the core portion.