Semiconductor Fin Formation via Hard Mask Patterning
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Solution Overview
Problem
Conventional methods for forming semiconductor devices face challenges in achieving high-quality fins due to size limitations and surface damage during the process of removing excess fins, leading to undesirable performance stability and potential device failure.
Innovation Solution
A method involving the formation of an isolation layer and hard mask layers on a substrate to define a fin pattern, allowing for the formation of first and second fins in specific openings, eliminating the need for excess fin removal and enabling flexible material and height control, thus ensuring fin quality and improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods are used to form fins by removing excess fins, then fin pattern can be achieved, but surface damage occurs and fin quality deteriorates
Solution Approach 1:
The patent applies preliminary action by forming the fin pattern through selective fin formation in openings defined by hard mask layers before any removal process. The hard mask layers are deposited and patterned first to define where fins should form, then fins are grown only in those predetermined locations, eliminating the need for subsequent excess fin removal that would cause surface damage.
Solution Approach 2:
The patent uses hard mask layers as an intermediary element to control fin formation. The hard mask layers serve as a mediating structure that defines the fin pattern and protects underlying areas from fin formation, allowing precise control over where fins are created without requiring damaging removal processes.
2Productivity
If component density is increased and device size is reduced, then integration level improves, but control over channel current weakens and leakage current increases
Solution Approach 1:
The patent applies local quality by creating different fin structures in different regions of the device. By using hard mask layers with varying patterns and materials, the invention enables different fin configurations (such as different heights, densities, or materials) in NMOS and PMOS regions, allowing optimized channel current control tailored to each transistor type while maintaining high component density.
3Manufacturing precision
If excess fins are removed to achieve correct fin pattern, then fin pattern accuracy improves, but process complexity increases and fin quality may deteriorate
Solution Approach 1:
The patent inverts the conventional approach by instead of forming fins everywhere and then removing excess fins, it forms fins only where needed from the beginning. The hard mask layers are patterned to define fin locations, and fins are grown selectively in openings, completely inverting the sequence of operations to eliminate the removal step and reduce process complexity.
Data Source
AI summary
A semiconductor device and a method for forming the semiconductor device are provided. The method includes providing a substrate including an NMOS region and a PMOS region, forming an isolation layer on the substrate, forming initial hard mask layers on the isolation layer, and forming hard mask layers by removing a number of initial hard mask layers from the initial hard mask layers. The method also includes forming openings in the isolation layer in the NMOS region by removing portions of the isolation layer covered by the hard mask layers in the NMOS region, forming first fins in the openings in the isolation layer in the NMOS region, forming openings in the isolation layer in the PMOS region by removing portions of the isolation layer covered by the hard mask layers in the PMOS region, and forming second fins in the openings in the isolation layer in the PMOS region.