Semiconductor Fin Metal-Semiconductor Layer Formation
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Solution Overview
Problem
The formation of metal-semiconductor layers in electronic devices with small features is challenging due to the consumption of semiconductor material, leading to increased electrical resistivity and rough interfaces, which can cause shorting issues between source/drain and channel regions.
Innovation Solution
A process involving the formation of a semiconductor fin over an insulating layer, followed by the deposition of a semiconductor layer with a dopant and a metal-containing layer, which reacts to form a metal-semiconductor layer with controlled interface roughness, reducing the consumption of semiconductor material and improving interface smoothness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal-containing layer reacts with a semiconductor layer to form a metal-semiconductor layer, then the electrical resistivity of the pathway is lowered, but semiconductor material is consumed which makes the process difficult to use in manufacturing electrical devices with small features
Solution Approach 1:
A liner layer is formed over the semiconductor layer before the metal-containing layer is deposited. This preliminary action prevents direct reaction between the metal and semiconductor materials, thereby preventing semiconductor material consumption while still allowing the metal-semiconductor layer to form and reduce electrical resistivity in the electrical pathway.
Solution Approach 2:
The liner layer acts as an intermediary barrier between the metal-containing layer and the semiconductor layer. It prevents direct contact and reaction between these two materials, eliminating the harmful consumption of semiconductor material while permitting the formation of the low-resistivity metal-semiconductor layer through controlled reaction at the liner interface.
2Reliability
If a metal-containing layer reacts with a semiconductor layer to form a metal-semiconductor layer, then the electrical resistivity is lowered, but the interface between layers becomes rough with Ra value greater than 4 nm which can cause shorting issues
Solution Approach 1:
The liner layer serves as a mediator that controls the reaction interface between metal and semiconductor materials. By providing a controlled reaction surface, it prevents direct uncontrolled reaction that would cause rough interfaces, thereby maintaining interface smoothness (Ra ≤ 4 nm) while still enabling the formation of the low-resistivity metal-semiconductor layer.
Solution Approach 2:
The liner layer acts as a buffer that absorbs and distributes mechanical stresses and thermal expansion differences between the metal-containing layer and semiconductor layer during processing and operation. This stress distribution prevents interface delamination and maintains interface integrity, ensuring smooth interfaces that prevent shorting while achieving low electrical resistivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the electrical resistivity of the pathways and minimizes interface roughness, enhancing the performance and reliability of electronic devices by preventing shorting between source/drain and channel regions.
Implementation Method 1
Reacting a metal-containing layer with a portion of a semiconductor layer can form a metal-semiconductor layer
Implementation Method 2
forming a semiconductor layer with a dopant
Data Source
AI summary
An electronic device can include a semiconductor fin overlying an insulating layer. The electronic device can also include a semiconductor layer overlying the semiconductor fin. The semiconductor layer can have a first portion and a second portion that are spaced-apart from each other. In one aspect, the electronic device can include a conductive member that lies between and spaced-apart from the first and second portions of the semiconductor layer. The electronic device can also include a metal-semiconductor layer overlying the semiconductor layer. In another aspect, the semiconductor layer can abut the semiconductor fin and include a dopant. In a further aspect, a process of forming the electronic device can include reacting a metal-containing layer and a semiconductor layer to form a metal-semiconductor layer. In another aspect, a process can include forming a semiconductor layer, including a dopant, abutting a wall surface of a semiconductor fin.