Semiconductor Fin Formation With Mid-Process Trim for Uniform Geometry
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing techniques for forming integrated circuit structures with semiconductor fins face challenges such as inconsistent fin widths and trench depths in fin trim first processes, and the formation of fin stubs in fin trim last processes, especially as fin spacing and width decrease.
Innovation Solution
A mid-process fin trim method is employed, where partially-formed fins are removed during the fin formation process using a sacrificial pattern blocking material and sacrificial fin cut mask layers, allowing for uniform fin dimensions and avoiding fin stubs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If fin trim first process is used, then fin formation is completed early in the process, but inconsistent fin widths and trench depths occur
Solution Approach 1:
The patent applies preliminary action by performing the fin trim operation at an intermediate stage during fin formation, rather than at the beginning or end. The method partially forms fins, removes selected fins mid-process, then completes fin formation in subsequent steps, ensuring uniform dimensions while maintaining process efficiency
Solution Approach 2:
The fin formation process is segmented into multiple stages: initial fin formation, mid-process fin removal, and subsequent fin completion. This segmentation allows selective removal of fins at partial formation stages, preventing the inconsistent dimensions that occur when trimming is done after complete formation
2Manufacturing precision
If fin trim last process is used, then all fins are formed completely before removal, but fin stubs are formed
Solution Approach 1:
The patent performs fin removal at an intermediate stage before complete fin formation, preventing fin stubs from forming in the first place. By removing fins when they are partially formed rather than after complete formation, the harmful fin stub effect is eliminated
Solution Approach 2:
The patent converts the potential harm of incomplete fin formation into a benefit by selectively removing partially-formed fins mid-process. This approach prevents fin stub formation while maintaining the ability to create precise fin patterns, turning what could be a defect into a controlled process advantage
3Quantity of substance
If fin spacing and width are decreased, then device density is improved, but fin uniformity and removal precision become more difficult to maintain
Solution Approach 1:
The mid-process fin removal approach allows for precise control of fin dimensions even at reduced spacings. By removing fins during formation rather than after, the process maintains better dimensional control and uniformity, enabling higher device density without sacrificing precision
Solution Approach 2:
The patent changes the temporal parameter of when fin removal occurs (mid-process rather than beginning or end), which enables better control over fin dimensions. This parameter change allows the process to accommodate smaller fin spacings and widths while maintaining uniformity through the selective removal of partially-formed fins
Data Source
AI summary
Techniques are disclosed for forming integrated circuit structures having a plurality of semiconductor fins, which in turn can be used to form non-planar transistor structures. The techniques include a mid-process removal of one or more partially-formed fins. The resulting integrated circuit structure includes a plurality of semiconductor fins having relatively uniform dimensions (e.g., fin width and trough depth). In an embodiment, the fin forming procedure includes partially forming a plurality of fins, using a selective etch stop built into the semiconductor structure in which the fins are being formed. One or more of the partially-formed fins are removed via sacrificial fin cut mask layer(s). After fin removal, the process continues by further etching trenches between the partially-formed fins (deep etch) to form portion of fins that will ultimately include transistor channel portion. A liner material may be deposited to protect the partially-formed fins during this subsequent deep trench etch.