Semiconductor Fin Pattern Formation via Self-Aligned Spacer Etching
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Solution Overview
Problem
As integration density of semiconductor devices increases, existing manufacturing methods struggle to produce fine patterns beyond the resolution limit of photolithography equipment, necessitating innovative processes for forming fin-shaped patterns and trench keys with varying pitches.
Innovation Solution
A method involving multiple sacrificial layers, mark generation layers, and spacer formation is employed to create fin-shaped patterns and trench keys through a series of etching and patterning steps, allowing for the formation of patterns with fine line widths and varying pitches using quadruple and double patterning technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography is used for manufacturing, then the manufacturing process is simple, but the pattern line width cannot exceed the resolution limit
Solution Approach 1:
The manufacturing process is divided into multiple patterning stages including self-aligned double patterning (SADP) and self-aligned quadruple patterning (SAQP). Each stage forms patterns sequentially using spacer layers, breaking down the complex task of creating sub-resolution patterns into manageable steps that achieve fine line widths without requiring higher resolution photolithography equipment
Solution Approach 2:
Mandrel patterns are formed first as preliminary structures that serve as templates for subsequent spacer formation. These mandrels are then used to define the positions of final patterns through self-aligned processes, ensuring precise pattern placement while achieving line widths below the photolithography resolution limit
2Manufacturing precision
If multiple patterning techniques are used to achieve fine patterns, then the pattern resolution is improved, but the manufacturing process becomes complex
Solution Approach 1:
The formation of mandrel patterns and spacer patterns is merged into self-aligned processes where the spacer formation automatically aligns to the mandrel patterns. This self-alignment eliminates the need for separate alignment steps, reducing process complexity while achieving the fine pattern resolution required by multiple patterning techniques
Solution Approach 2:
The spacer layers automatically form conformal coatings on the mandrel patterns, and subsequent etching processes use these spacers as self-aligned masks. The structures serve their own alignment and positioning functions without requiring external alignment equipment or complex control systems, simplifying the overall manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the manufacturing process by enabling the creation of semiconductor devices with fine line widths and trench keys, overcoming the resolution limitations of conventional photolithography and allowing for higher integration density.
Implementation Method 1
forming a first mark generation pattern by partially etching the first mark generation layer using the first key pattern as an etch mask, forming a second pattern by etching the first sacrificial layer of the first region using the first pattern as an etch mask
Implementation Method 2
forming first spacers on sidewalls of the second pattern and first key spacers on sidewalls of the second key pattern
Data Source
AI summary
A method of manufacturing a semiconductor device may include forming a sacrificial layer on a substrate including a first region and a second region, forming a first pattern on the sacrificial layer of the second region, forming a second pattern on the sacrificial layer of the first region, forming first upper spacers on opposite sidewalls of the second pattern, removing the second pattern, etching the first sacrificial layer of the first region using the first upper spacers as an etch mask to form a third pattern, etching the first sacrificial layer of the second region using the first pattern as an etch mask to form a fourth pattern, forming first lower spacers at either side of the third pattern, forming second spacers on opposite sidewalls of the fourth pattern, removing the third pattern and the fourth pattern, and etching the substrate using the first lower spacers and the second spacers as etch masks.