Semiconductor Device Formation Without Fin Recessing

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Solution Overview

Problem

Existing semiconductor device fabrication methods require recessing of fins and shallow trench isolation (STI) portions, which complicates the process and reduces efficiency.

Innovation Solution

A method of forming a semiconductor device that involves forming a dielectric layer over a dummy gate and STI portions, removing the dummy gate to expose channel surfaces, and forming a gate over the channel surfaces without the need to recess the fin or STI portions, thereby simplifying the process and enhancing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If recessing of fins and shallow trench isolation portions is performed in traditional fabrication methods, then the gate can be properly formed over the channel region, but the fabrication process becomes more complex and less efficient

Engineering Contradiction:
Improvegate formation precisionVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A dummy gate structure is formed over the channel region before the actual gate formation. This preliminary structure serves as a placeholder that eliminates the need for subsequent recessing operations on fins and shallow trench isolation portions, while still enabling precise gate alignment and formation in later steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dummy gate acts as an intermediary structure that facilitates the gate formation process. It temporarily occupies the gate position during fabrication, allowing other structures (fins and STI) to remain at their original heights without requiring complex recessing operations

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If recessing operations are performed on fins and STI portions, then proper gate positioning is achieved, but fabrication time and process steps increase

Engineering Contradiction:
Improvegate positioning accuracyVSAvoidfabrication efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The dummy gate is formed in advance to establish the correct gate position and dimensions before actual gate fabrication. This preliminary positioning eliminates the need for time-consuming recessing operations while maintaining precise gate alignment with the channel region

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The problematic recessing operations are completely removed from the fabrication process by using the dummy gate approach. The dummy gate enables direct gate formation without requiring extraction or removal of material from fins and STI portions

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11114546B2Semiconductor device and formation thereof
Publication Date: 2021.09.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11114546B2 patent drawing
  • US11114546B2 patent drawing
  • US11114546B2 patent drawing

AI summary

A semiconductor device and methods of formation are provided. The semiconductor device includes a gate over a channel portion of a fin. The fin includes a first active area of the fin having a first active area top surface coplanar with a first shallow trench isolation (STI) top surface of a first STI portion of STI, and a second active area of the fin having a second active area top surface coplanar with a second STI top surface of a second STI portion of the STI. The method herein negates a need to recess at least one of the fin, the first STI portion or the second STI portion during device formation. Negating a need to recess at least one of the fin, the first STI portion or the second STI portion enhances the semiconductor device formation and is more efficient than a semiconductor device formation that requires the recessing of at least one of a fin, a first STI portion or a second STI portion.