Semiconductor Fin Transistors with Selective Oxidation for Threshold Voltage Control

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Solution Overview

Problem

Current semiconductor devices face challenges in achieving high-reliability, high-speed, and multi-functional performance due to limitations in controlling threshold voltages across different regions, which complicates the integration and manufacturing processes.

Innovation Solution

The method involves forming silicon-germanium (SiGe) fins with varying germanium concentrations on a substrate, using oxidation processes to create germanium-rich layers, and forming gate dielectric and gate electrode patterns to achieve distinct threshold voltages for transistors, allowing for the fabrication of semiconductor devices with different threshold voltages in separate regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If uniform fins are formed across the entire substrate, then manufacturing process is simple, but threshold voltage cannot be differentiated across regions

Engineering Contradiction:
Improvethreshold voltage differentiationVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by forming germanium-rich layers selectively on fins in specific regions (second region) while leaving fins in other regions (first region) unchanged. This is achieved through selective oxidation processes that modify only localized areas, creating different threshold voltages in different regions without requiring completely different manufacturing processes for each region.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the germanium concentration parameter locally by forming germanium-rich layers on selected fins. This parameter change (increasing germanium concentration from typical 5-15% to 60-80% in rich layers) directly affects the threshold voltage of transistors formed on those fins, enabling voltage differentiation while maintaining a unified base manufacturing process.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If multiple fin types with different compositions are formed, then different threshold voltages are achieved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidgermanium layer formation precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent uses an intermediary approach by forming an oxide layer as a mediator during the germanium-rich layer formation process. The oxide layer is grown on the fin surface first, then serves as a template or intermediary structure upon which the germanium-rich layer is formed. This intermediary step helps control the precision of germanium layer formation by providing a defined interface and reducing direct complexity of depositing germanium with precise thickness and composition.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the production of semiconductor devices with controlled threshold voltages, enhancing their reliability and performance by varying the germanium concentration on the fin surfaces, thereby simplifying the manufacturing process and improving integration.

Implementation Method 1

oxidizing the first fins in the second region to form second fins in the second region

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS9514990B2Methods for manufacturing semiconductor devices having different threshold voltages
Publication Date: 2016.12.06 SAMSUNG ELECTRONICS CO LTD
  • US9514990B2 patent drawing
  • US9514990B2 patent drawing
  • US9514990B2 patent drawing

AI summary

Methods for manufacturing a semiconductor device including a field effect transistor include forming first fins protruding from a substrate including a first region and a second region, the first fins including silicon-germanium (SiGe), forming a first mask pattern to expose the first fins disposed in the second region, the first mask pattern covering the first fins disposed in the first region, oxidizing the first fins in the second region to form second fins in the second region, and forming germanium (Ge)-rich layers each disposed on a surface of a respective one of the second fins.