Semiconductor Fin Trimming for Uniform Fin Width and Trench Depth
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Solution Overview
Problem
Existing techniques for forming integrated circuit structures with semiconductor fins face challenges in achieving uniform fin dimensions and preventing fin stubs, particularly as fin spacing and width decrease, leading to inconsistent fin widths and trench depths in fin trim first processes, and fin stubs in fin trim last processes.
Innovation Solution
A mid-process fin trim method is employed, where partially formed fins are removed using a sacrificial pattern blocking material and sacrificial fin cut mask layers, allowing for uniform fin geometry and eliminating fin stubs by transferring fin trim patterns to the structural part of the fin using a selective etch stop layer before deep trough etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If fin trim first process is used, then fin width can be controlled, but trench depth becomes inconsistent and fin width uniformity deteriorates
Solution Approach 1:
The fin formation process is divided into two separate etching steps: a first etch that creates initial fin structures with controlled width, and a second etch that completes the trench formation to uniform depth. This segmentation allows independent optimization of fin width control and trench depth consistency, resolving the contradiction between these two parameters.
2Manufacturing precision
If fin trim last process is used, then trench depth can be controlled, but fin stubs are created affecting reliability
Solution Approach 1:
The fin trim pattern is transferred to the fin structure during the first etching step before the trench is fully formed. This preliminary action defines which fins will be removed, allowing the second etch to complete the trench to uniform depth without creating fin stubs, thus maintaining both trench depth control and reliability.
3Productivity
If closer fin spacing is used, then device density increases, but patterning precision and fin uniformity become more difficult to maintain
Solution Approach 1:
The two-step etching process with intermediate pattern transfer enables precise control of fin width and spacing even at high density. The first etch establishes uniform fin patterns with controlled spacing, and the second etch completes the structure, maintaining manufacturing precision while achieving high device density through closer fin spacing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in integrated circuit structures with uniformly sized semiconductor fins and eliminates fin stubs, improving power leakage and performance by ensuring consistent fin widths and trench depths, and increasing the patterning process margin.
Implementation Method 1
transferred to a structural part of the fin using a selective etch stop layer
Data Source
AI summary
Techniques are disclosed for forming integrated circuit structures having a plurality of semiconductor fins, which in turn can be used to form non-planar transistor structures. The techniques include a mid-process removal of one or more partially-formed fins. The resulting integrated circuit structure includes a plurality of semiconductor fins having relatively uniform dimensions (e.g., fin width and trough depth). In an embodiment, the fin forming procedure includes partially forming a plurality of fins, using a selective etch stop built into the semiconductor structure in which the fins are being formed. One or more of the partially-formed fins are removed via sacrificial fin cut mask layer(s). After fin removal, the process continues by further etching trenches between the partially-formed fins (deep etch) to form portion of fins that will ultimately include transistor channel portion. A liner material may be deposited to protect the partially-formed fins during this subsequent deep trench etch.