Semiconductor Fine Pattern Formation via Hard Mask Etching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in semiconductor device manufacturing is forming fine patterns with reduced pitch, as the resolution limit of photolithography processes makes it difficult to create patterns with small dimensions, especially in highly integrated devices where precise feature sizes and spacing are critical.

Innovation Solution

A method involving the formation of a hard mask layer with specific hole patterns and subsequent etching processes, including the use of local mask patterns and sacrificial layers, to create fine patterns in zigzag or honeycomb arrangements, allowing for precise control over feature size and spacing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If photolithography process is used to form patterns, then manufacturing capability is improved, but manufacturing precision deteriorates due to resolution limit

Engineering Contradiction:
Improvemanufacturing capabilityVSAvoidpattern precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent divides the pattern formation process into multiple stages: first forming a mandrel layer with initial patterns, then forming a sacrificial layer, followed by forming local mask patterns, and finally forming the target fine patterns. This segmentation allows each stage to be optimized independently, enabling precision beyond single-step photolithography limits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by first forming the mandrel layer with larger, easier-to-form patterns, then using these as templates to guide subsequent sacrificial layer formation and local mask pattern creation. This preliminary structuring enables precise final pattern formation that would be difficult to achieve directly through photolithography alone.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If pitch of patterns is reduced to increase integration density, then productivity is improved, but manufacturing precision deteriorates due to fine pattern formation difficulty

Engineering Contradiction:
Improveintegration densityVSAvoidfine pattern precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent introduces intermediate structures including the mandrel layer and sacrificial layer that act as mediators between the photolithography process and the final fine patterns. These intermediaries enable the transfer of patterns at reduced pitch while maintaining precision, as they provide physical templates that guide material deposition and removal processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transitions from two-dimensional planar patterning to three-dimensional structures by forming vertical stacks of mandrel layer, sacrificial layer, and local mask patterns. This dimensional transition enables pitch multiplication and fine pattern formation that overcomes the limitations of direct planar photolithography.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If multiple etching processes are used to form fine patterns, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvepattern precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into the local mask patterns, which simultaneously serve as etch masks for creating openings in the sacrificial layer, as sacrificial material to be removed, and as templates for defining the final fine pattern locations. This merging reduces the number of separate process steps needed compared to traditional multi-layer mask approaches.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the formation of fine patterns with consistent dimensions and spacing, improving the integration density of semiconductor devices while maintaining overlay precision, even within limited areas.

Implementation Method 1

anisotropically etching the portions of the hard mask layer to form a plurality of second holes

Methodology Applied
Scientific EffectAnisotropic etching:

Data Source

PatentUS9099403B2Methods for forming a semiconductor device including fine patterns
Publication Date: 2015.08.04 SAMSUNG ELECTRONICS CO LTD
  • US9099403B2 patent drawing
  • US9099403B2 patent drawing
  • US9099403B2 patent drawing

AI summary

Methods for forming a semiconductor device including fine patterns are provided. The method may include forming a mask layer including first holes spaced apart from each other in a first direction and a second direction. The method may also include forming local mask patterns on the mask layer and forming a sacrificial layer on the mask layer filling the first holes and surrounding the local mask patterns. The local mask patterns may be offset from the first holes in the first direction and the second direction. The method may further include removing the local mask patterns to form openings in the sacrificial layer exposing the mask layer and etching the mask layer through the opening to form second holes in the mask layer.