Semiconductor Floating Regions Voltage Equalization
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Solution Overview
Problem
Existing semiconductor devices with multiple potential regions face challenges in maintaining equal voltages between adjacent floating regions, leading to reduced breakdown voltage and reliability due to capacitive divider structures that cannot equalize voltages between adjacent regions.
Innovation Solution
Incorporating external capacitances that increase with distance from the high potential end, or strategically connecting capacitances to reduce voltage differences between adjacent floating regions, thereby equalizing voltages and enhancing breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a capacitive divider structure with multiple floating regions is used to increase breakdown voltage, then the overall breakdown voltage increases, but the voltage between adjacent floating regions becomes unequal leading to reduced reliability
Solution Approach 1:
The patent applies local quality by making the insulating regions have different thicknesses at different positions. Specifically, the insulating region between floating regions closer to the high potential end has greater thickness than those farther away, creating locally differentiated capacitance values that compensate for the positional voltage distribution imbalance and achieve more uniform voltage across adjacent floating regions.
Solution Approach 2:
The patent changes the physical parameter of the insulating region thickness to control the capacitance distribution. By varying the thickness parameter of insulating regions at different positions, the capacitance values are adjusted to compensate for the unequal voltage division, transforming the voltage distribution from non-uniform to uniform across the floating regions.
2Ease of manufacture
If insulating regions with uniform thickness are used between floating regions, then manufacturing is simplified, but voltage cannot be equalized between adjacent regions
Solution Approach 1:
The patent implements local quality by introducing positional variation in insulating region thickness. Instead of uniform thickness throughout, the insulating regions have progressively different thicknesses based on their position relative to the high potential end, creating localized capacitance adjustments that enable voltage equalization while maintaining a relatively simple manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces voltage differences between adjacent regions, increasing the overall breakdown voltage and reliability of semiconductor devices by equalizing voltages and distributing stress more evenly across the structure.
Implementation Method 1
the voltage (or potential difference) between the rightmost and leftmost regions 3(0) and 3(n+1) is capacitively divided so that the regions 3(1) to 3(n) are at different potentials
Implementation Method 2
The capacitance forming portion forms an external capacitance in parallel with either the capacitance of the insulating region between the first floating region and the island region of the predetermined potential
Data Source
AI summary
A semiconductor device includes a plurality of floating regions, an insulating layer and a capacitance forming portion. The plurality of floating regions are arranged on a surface of a semiconductor substrate in a row, wherein the plurality of floating regions are provided with insulating regions therebetween. The plurality of floating regions include a first floating region and a second floating region. The second floating region is located farther than the first floating region from an island region of a predetermined potential on the semiconductor substrate. The insulating layer is interposed between each of the plurality of floating regions and a semiconductor material layer of the semiconductor substrate. The capacitance forming portion forms an external capacitance in parallel with the capacitance of the insulating region between the first floating region and the island region of the predetermined potential.


