Semiconductor Process Flow Analysis Using Parallel Coordinates
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Solution Overview
Problem
Existing semiconductor manufacturing processes face challenges in efficiently analyzing complex process flows to identify defects due to the increasing number of processes and their complexity, necessitating improved methods for visualizing process performance histories.
Innovation Solution
An electronic device and method that utilizes a processor to receive and analyze process entry data, extract sequence data, select analysis parameters, sort data based on these parameters, and map the sorted data to a parallel coordinate system to generate analysis data, including time and wafer-specific process flow information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of manufacturing processes increases to meet advancing semiconductor design technology, then manufacturing capability and design complexity are improved, but the difficulty of detecting and measuring defects increases due to the growing number of processes and their complexity
Solution Approach 1:
The patent segments the complex semiconductor manufacturing process into multiple discrete process sections, each with its own performance history data. This segmentation allows the system to analyze specific process sections independently rather than dealing with the entire complex process flow at once, making defect detection more manageable despite the increasing number of processes.
Solution Approach 2:
The patent introduces a visual dimension by mapping process performance history data onto a visual interface that displays multiple process sections simultaneously. This dimensional transformation from tabular data to visual representation enables operators to detect abnormalities across numerous processes more easily, addressing the difficulty of detecting defects in complex manufacturing systems.
2Measurement precision
If process flow analysis is conducted to compare normal and defective wafers, then defect identification capability is improved, but the loss of time increases due to the complexity of analyzing multiple processes
Solution Approach 1:
The patent performs preliminary actions by pre-collecting and organizing process performance history data for multiple process sections before defect analysis is needed. The system maintains ready-to-use visual representations of normal process flows, enabling rapid comparison when defects occur without requiring time-consuming data collection during the analysis phase.
Solution Approach 2:
The patent creates visual copies of process performance history data in the form of visual process flow representations. These visual copies allow for rapid comparison between normal and defective wafers across multiple process sections simultaneously, maintaining high defect identification accuracy while significantly reducing the time required for analysis compared to examining raw data tables.
3Ease of operation
If process performance history data is visualized to facilitate defect detection, then ease of operation is improved, but the device complexity increases due to the need for data processing and mapping systems
Solution Approach 1:
The patent implements a universal data processing platform that handles multiple process sections and various types of performance data through a single integrated system. This multi-functional approach consolidates what would otherwise require separate analysis tools for each process section, reducing overall system complexity while maintaining ease of operation for detecting defects across the entire manufacturing process.
Solution Approach 2:
The patent introduces an intermediary visual layer that sits between the raw process performance data and the operator. This visual interface acts as a mediator, automatically processing complex multi-dimensional data and presenting it in an easily interpretable format. The intermediary handles the complexity of data processing internally while presenting a simple, easy-to-use interface to operators for defect detection.
Data Source
AI summary
An operating method for an electronic device including a processor for analyzing a semiconductor process flow, the method including: receiving process entry data for a plurality of wafers; extracting process sequence data that enumerates processes related to the plurality of wafers in order of execution times, based on the process entry data; selecting an analysis target parameter from among process parameters included in the process entry data; sorting the process entry data based on the process sequence data and the analysis target parameter; and mapping the sorted process entry data to a parallel coordinate system to generate analysis data, wherein the analysis data includes time information related to the processes in the process sequence data and wafer-specific process flow information corresponding to the analysis target parameter.