Semiconductor Frequency Regulation via Operating State Signals

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Solution Overview

Problem

Existing semiconductor devices face challenges in dynamically adjusting clock frequencies to match changing performance requirements, leading to inefficient power consumption and extended active states, which limits performance and increases power usage.

Innovation Solution

A semiconductor device with a frequency regulating circuit that uses a table to control clock frequencies based on operating state signals, allowing for regular and adaptive frequency adjustments without relying on the operating system, thereby reducing power consumption and improving performance responsiveness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the CPU core operates at high frequency to meet performance requirements, then the processing performance is improved, but the power consumption increases

Engineering Contradiction:
Improveprocessing performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic clock frequency adjustment by regulating the clock frequency based on the operating state signal from the CPU core. The frequency regulating circuit adjusts the clock frequency in real-time according to actual performance needs, allowing the system to operate at high frequency when performance is required and at lower frequency when power saving is prioritized, thus resolving the contradiction between processing performance and power consumption

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating parameter (clock frequency) dynamically based on the CPU core's operating state. By monitoring the operating state signal and adjusting the clock frequency accordingly, the system can optimize the balance between performance and power consumption, transforming the static high-frequency operation into a dynamic parameter adjustment that adapts to actual workload requirements

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the clock frequency is adjusted frequently to match changing loads, then the performance responsiveness is improved, but the control complexity increases

Engineering Contradiction:
Improveperformance responsivenessVSAvoidcontrol complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The frequency regulating circuit automatically adjusts the clock frequency based on the operating state signal generated by the CPU core itself, without requiring external control or complex decision-making logic. The system uses the CPU's own operating state information to trigger frequency adjustments, simplifying the control mechanism while maintaining high performance responsiveness

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent implements a feedback mechanism where the operating state signal from the CPU core is continuously monitored and fed back to the frequency regulating circuit. This feedback loop enables automatic frequency adjustment based on actual performance needs, achieving high responsiveness without requiring complex control algorithms or multiple decision layers

Inventive Principle:
Principle #23Feedback

3Speed

If the CPU core remains in active state to maintain performance, then the response time is reduced, but the power consumption increases

Engineering Contradiction:
Improveresponse timeVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent dynamically adjusts the clock frequency based on the CPU core's operating state, allowing the system to reduce frequency (and thus power consumption) when the CPU is in idle or low-activity states, while quickly restoring high frequency when performance is needed. This dynamic adjustment eliminates the need to maintain constant high-frequency operation, reducing power consumption while preserving fast response capability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The frequency regulating circuit periodically monitors the operating state signal and adjusts the clock frequency at appropriate intervals. This periodic adjustment allows the system to maintain readiness for performance demands while enabling power saving during stable low-load periods, balancing response time requirements with power consumption reduction

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9898068B2Semiconductor device, electronic device, and method for controlling semiconductor device
Publication Date: 2018.02.20 RENESAS ELECTRONICS CORP
  • US9898068B2 patent drawing
  • US9898068B2 patent drawing
  • US9898068B2 patent drawing

AI summary

A semiconductor device includes a CPU core, a frequency regulating circuit, and a frequency control circuit. The frequency regulating circuit includes a table. The frequency control circuit provides a clock to the CPU core. The CPU core outputs an operating state signal indicating an operating state of the CPU core. The frequency regulating circuit controls a frequency of the clock based on the table and the operating state signal. Thus it is possible to provide a semiconductor device that allows performance to follow a dynamically changing load.